From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from eggs.gnu.org ([208.118.235.92]:35366)
	by lists.gnu.org with esmtp (Exim 4.71)
	(envelope-from <aurelien@aurel32.net>) id 1URcj9-0005PY-01
	for qemu-devel@nongnu.org; Mon, 15 Apr 2013 02:17:20 -0400
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <aurelien@aurel32.net>) id 1URcj7-0004Ue-PT
	for qemu-devel@nongnu.org; Mon, 15 Apr 2013 02:17:18 -0400
Date: Mon, 15 Apr 2013 08:16:55 +0200
From: Aurelien Jarno <aurelien@aurel32.net>
Message-ID: <20130415061655.GA11241@ohm.aurel32.net>
References: <1365857251-28173-1-git-send-email-aurelien@aurel32.net>
	<1365857251-28173-2-git-send-email-aurelien@aurel32.net>
	<CAFEAcA-edueScvjARpeydP+zVL_-MapD=q8ztt4DijU8CPFo_Q@mail.gmail.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=iso-8859-15
Content-Disposition: inline
In-Reply-To: <CAFEAcA-edueScvjARpeydP+zVL_-MapD=q8ztt4DijU8CPFo_Q@mail.gmail.com>
Subject: Re: [Qemu-devel] [PATCH 01/10] target-ppc: optimize fabs, fnabs,
	fneg
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Alexander Graf <agraf@suse.de>

On Sat, Apr 13, 2013 at 02:20:10PM +0100, Peter Maydell wrote:
> On 13 April 2013 13:47, Aurelien Jarno <aurelien@aurel32.net> wrote:
> > fabs, fnabs and fneg are just flipping the bit sign of an FP register,
> > this can be implemented in TCG instead of using softfloat.
> > +    tcg_gen_andi_i64(cpu_fpr[rD(ctx->opcode)], cpu_fpr[rB(ctx->opcode)],
> > +                     ~(1LL << 63));
> 
> "1LL << 63" is undefined behaviour; you probably want "1ULL << 63".
> 

Thanks, I'll fix that in the next version.


-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net