From: Igor Mammedov <imammedo@redhat.com>
To: Eduardo Habkost <ehabkost@redhat.com>
Cc: qemu-devel@nongnu.org, "Andreas Färber" <afaerber@suse.de>
Subject: Re: [Qemu-devel] [PATCH qom-cpu 3/4] target-i386/cpu.c: Break lines so they don't get too long
Date: Tue, 16 Apr 2013 20:39:44 +0200 [thread overview]
Message-ID: <20130416203944.55eadd72@thinkpad> (raw)
In-Reply-To: <1366128724-31860-4-git-send-email-ehabkost@redhat.com>
On Tue, 16 Apr 2013 13:12:03 -0300
Eduardo Habkost <ehabkost@redhat.com> wrote:
> Break lines on kvm_check_features_against_host(), kvm_cpu_fill_host(),
> and builtin_x86_defs, so they don't get too long once the *_features
> fields are replaced by an array.
>
> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
> ---
> Changes v9:
> * Merged all "Break lines" patches from previous series into a single
> patch
> ---
> target-i386/cpu.c | 270 ++++++++++++++++++++++++++++++++++++------------------
> 1 file changed, 180 insertions(+), 90 deletions(-)
>
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index 732cafd..73ae2ef 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
[...]
> @@ -624,14 +660,18 @@ static x86_def_t builtin_x86_defs[] = {
> .family = 6,
> .model = 2,
> .stepping = 3,
> - .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + .features =
> + CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
alignment off by one compared to following lines, but follows 4 spaces
indentation coding style. The same for the following CPU models.
Not worth of re-spinning though.
> CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
> CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> CPUID_DE | CPUID_FP87,
> - .ext_features = CPUID_EXT_SSSE3 | CPUID_EXT_SSE3,
> - .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_NX | CPUID_EXT2_SYSCALL,
> - .ext3_features = CPUID_EXT3_LAHF_LM,
> + .ext_features =
> + CPUID_EXT_SSSE3 | CPUID_EXT_SSE3,
> + .ext2_features =
> + CPUID_EXT2_LM | CPUID_EXT2_NX | CPUID_EXT2_SYSCALL,
> + .ext3_features =
> + CPUID_EXT3_LAHF_LM,
> .xlevel = 0x8000000A,
> .model_id = "Intel Celeron_4x0 (Conroe/Merom Class Core 2)",
> },
> @@ -642,15 +682,19 @@ static x86_def_t builtin_x86_defs[] = {
> .family = 6,
> .model = 2,
> .stepping = 3,
> - .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + .features =
> + CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
> CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> CPUID_DE | CPUID_FP87,
> - .ext_features = CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
> + .ext_features =
> + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
> CPUID_EXT_SSE3,
> - .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_NX | CPUID_EXT2_SYSCALL,
> - .ext3_features = CPUID_EXT3_LAHF_LM,
> + .ext2_features =
> + CPUID_EXT2_LM | CPUID_EXT2_NX | CPUID_EXT2_SYSCALL,
> + .ext3_features =
> + CPUID_EXT3_LAHF_LM,
> .xlevel = 0x8000000A,
> .model_id = "Intel Core 2 Duo P9xxx (Penryn Class Core 2)",
> },
> @@ -661,15 +705,19 @@ static x86_def_t builtin_x86_defs[] = {
> .family = 6,
> .model = 2,
> .stepping = 3,
> - .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + .features =
> + CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
> CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> CPUID_DE | CPUID_FP87,
> - .ext_features = CPUID_EXT_POPCNT | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
> + .ext_features =
> + CPUID_EXT_POPCNT | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
> CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_SSE3,
> - .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
> - .ext3_features = CPUID_EXT3_LAHF_LM,
> + .ext2_features =
> + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
> + .ext3_features =
> + CPUID_EXT3_LAHF_LM,
> .xlevel = 0x8000000A,
> .model_id = "Intel Core i7 9xx (Nehalem Class Core i7)",
> },
> @@ -680,16 +728,20 @@ static x86_def_t builtin_x86_defs[] = {
> .family = 6,
> .model = 44,
> .stepping = 1,
> - .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + .features =
> + CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
> CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> CPUID_DE | CPUID_FP87,
> - .ext_features = CPUID_EXT_AES | CPUID_EXT_POPCNT | CPUID_EXT_SSE42 |
> + .ext_features =
> + CPUID_EXT_AES | CPUID_EXT_POPCNT | CPUID_EXT_SSE42 |
> CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
> CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3,
> - .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
> - .ext3_features = CPUID_EXT3_LAHF_LM,
> + .ext2_features =
> + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
> + .ext3_features =
> + CPUID_EXT3_LAHF_LM,
> .xlevel = 0x8000000A,
> .model_id = "Westmere E56xx/L56xx/X56xx (Nehalem-C)",
> },
> @@ -700,19 +752,23 @@ static x86_def_t builtin_x86_defs[] = {
> .family = 6,
> .model = 42,
> .stepping = 1,
> - .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + .features =
> + CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
> CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> CPUID_DE | CPUID_FP87,
> - .ext_features = CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
> + .ext_features =
> + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
> CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_POPCNT |
> CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
> CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ |
> CPUID_EXT_SSE3,
> - .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
> + .ext2_features =
> + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
> CPUID_EXT2_SYSCALL,
> - .ext3_features = CPUID_EXT3_LAHF_LM,
> + .ext3_features =
> + CPUID_EXT3_LAHF_LM,
> .xlevel = 0x8000000A,
> .model_id = "Intel Xeon E312xx (Sandy Bridge)",
> },
> @@ -723,21 +779,26 @@ static x86_def_t builtin_x86_defs[] = {
> .family = 6,
> .model = 60,
> .stepping = 1,
> - .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + .features =
> + CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
> CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> CPUID_DE | CPUID_FP87,
> - .ext_features = CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
> + .ext_features =
> + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
> CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
> CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
> CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
> CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
> CPUID_EXT_PCID,
> - .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
> + .ext2_features =
> + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
> CPUID_EXT2_SYSCALL,
> - .ext3_features = CPUID_EXT3_LAHF_LM,
> - .cpuid_7_0_ebx_features = CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
> + .ext3_features =
> + CPUID_EXT3_LAHF_LM,
> + .cpuid_7_0_ebx_features =
> + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
> CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
> CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
> CPUID_7_0_EBX_RTM,
> @@ -751,13 +812,16 @@ static x86_def_t builtin_x86_defs[] = {
> .family = 15,
> .model = 6,
> .stepping = 1,
> - .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + .features =
> + CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
> CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> CPUID_DE | CPUID_FP87,
> - .ext_features = CPUID_EXT_SSE3,
> - .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_FXSR | CPUID_EXT2_MMX |
> + .ext_features =
> + CPUID_EXT_SSE3,
> + .ext2_features =
> + CPUID_EXT2_LM | CPUID_EXT2_FXSR | CPUID_EXT2_MMX |
> CPUID_EXT2_NX | CPUID_EXT2_PSE36 | CPUID_EXT2_PAT |
> CPUID_EXT2_CMOV | CPUID_EXT2_MCA | CPUID_EXT2_PGE |
> CPUID_EXT2_MTRR | CPUID_EXT2_SYSCALL | CPUID_EXT2_APIC |
> @@ -773,20 +837,24 @@ static x86_def_t builtin_x86_defs[] = {
> .family = 15,
> .model = 6,
> .stepping = 1,
> - .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + .features =
> + CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
> CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> CPUID_DE | CPUID_FP87,
> - .ext_features = CPUID_EXT_CX16 | CPUID_EXT_SSE3,
> - .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_FXSR |
> + .ext_features =
> + CPUID_EXT_CX16 | CPUID_EXT_SSE3,
> + .ext2_features =
> + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_FXSR |
> CPUID_EXT2_MMX | CPUID_EXT2_NX | CPUID_EXT2_PSE36 |
> CPUID_EXT2_PAT | CPUID_EXT2_CMOV | CPUID_EXT2_MCA |
> CPUID_EXT2_PGE | CPUID_EXT2_MTRR | CPUID_EXT2_SYSCALL |
> CPUID_EXT2_APIC | CPUID_EXT2_CX8 | CPUID_EXT2_MCE |
> CPUID_EXT2_PAE | CPUID_EXT2_MSR | CPUID_EXT2_TSC | CPUID_EXT2_PSE |
> CPUID_EXT2_DE | CPUID_EXT2_FPU,
> - .ext3_features = CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM,
> + .ext3_features =
> + CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM,
> .xlevel = 0x80000008,
> .model_id = "AMD Opteron 22xx (Gen 2 Class Opteron)",
> },
> @@ -797,21 +865,25 @@ static x86_def_t builtin_x86_defs[] = {
> .family = 15,
> .model = 6,
> .stepping = 1,
> - .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + .features =
> + CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
> CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> CPUID_DE | CPUID_FP87,
> - .ext_features = CPUID_EXT_POPCNT | CPUID_EXT_CX16 | CPUID_EXT_MONITOR |
> + .ext_features =
> + CPUID_EXT_POPCNT | CPUID_EXT_CX16 | CPUID_EXT_MONITOR |
> CPUID_EXT_SSE3,
> - .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_FXSR |
> + .ext2_features =
> + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_FXSR |
> CPUID_EXT2_MMX | CPUID_EXT2_NX | CPUID_EXT2_PSE36 |
> CPUID_EXT2_PAT | CPUID_EXT2_CMOV | CPUID_EXT2_MCA |
> CPUID_EXT2_PGE | CPUID_EXT2_MTRR | CPUID_EXT2_SYSCALL |
> CPUID_EXT2_APIC | CPUID_EXT2_CX8 | CPUID_EXT2_MCE |
> CPUID_EXT2_PAE | CPUID_EXT2_MSR | CPUID_EXT2_TSC | CPUID_EXT2_PSE |
> CPUID_EXT2_DE | CPUID_EXT2_FPU,
> - .ext3_features = CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A |
> + .ext3_features =
> + CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A |
> CPUID_EXT3_ABM | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM,
> .xlevel = 0x80000008,
> .model_id = "AMD Opteron 23xx (Gen 3 Class Opteron)",
> @@ -823,23 +895,27 @@ static x86_def_t builtin_x86_defs[] = {
> .family = 21,
> .model = 1,
> .stepping = 2,
> - .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + .features =
> + CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
> CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> CPUID_DE | CPUID_FP87,
> - .ext_features = CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
> + .ext_features =
> + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
> CPUID_EXT_POPCNT | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
> CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ |
> CPUID_EXT_SSE3,
> - .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP |
> + .ext2_features =
> + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP |
> CPUID_EXT2_PDPE1GB | CPUID_EXT2_FXSR | CPUID_EXT2_MMX |
> CPUID_EXT2_NX | CPUID_EXT2_PSE36 | CPUID_EXT2_PAT |
> CPUID_EXT2_CMOV | CPUID_EXT2_MCA | CPUID_EXT2_PGE |
> CPUID_EXT2_MTRR | CPUID_EXT2_SYSCALL | CPUID_EXT2_APIC |
> CPUID_EXT2_CX8 | CPUID_EXT2_MCE | CPUID_EXT2_PAE | CPUID_EXT2_MSR |
> CPUID_EXT2_TSC | CPUID_EXT2_PSE | CPUID_EXT2_DE | CPUID_EXT2_FPU,
> - .ext3_features = CPUID_EXT3_FMA4 | CPUID_EXT3_XOP |
> + .ext3_features =
> + CPUID_EXT3_FMA4 | CPUID_EXT3_XOP |
> CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_MISALIGNSSE |
> CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | CPUID_EXT3_SVM |
> CPUID_EXT3_LAHF_LM,
> @@ -853,23 +929,27 @@ static x86_def_t builtin_x86_defs[] = {
> .family = 21,
> .model = 2,
> .stepping = 0,
> - .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> + .features =
> + CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
> CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> CPUID_DE | CPUID_FP87,
> - .ext_features = CPUID_EXT_F16C | CPUID_EXT_AVX | CPUID_EXT_XSAVE |
> + .ext_features =
> + CPUID_EXT_F16C | CPUID_EXT_AVX | CPUID_EXT_XSAVE |
> CPUID_EXT_AES | CPUID_EXT_POPCNT | CPUID_EXT_SSE42 |
> CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_FMA |
> CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3,
> - .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP |
> + .ext2_features =
> + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP |
> CPUID_EXT2_PDPE1GB | CPUID_EXT2_FXSR | CPUID_EXT2_MMX |
> CPUID_EXT2_NX | CPUID_EXT2_PSE36 | CPUID_EXT2_PAT |
> CPUID_EXT2_CMOV | CPUID_EXT2_MCA | CPUID_EXT2_PGE |
> CPUID_EXT2_MTRR | CPUID_EXT2_SYSCALL | CPUID_EXT2_APIC |
> CPUID_EXT2_CX8 | CPUID_EXT2_MCE | CPUID_EXT2_PAE | CPUID_EXT2_MSR |
> CPUID_EXT2_TSC | CPUID_EXT2_PSE | CPUID_EXT2_DE | CPUID_EXT2_FPU,
> - .ext3_features = CPUID_EXT3_TBM | CPUID_EXT3_FMA4 | CPUID_EXT3_XOP |
> + .ext3_features =
> + CPUID_EXT3_TBM | CPUID_EXT3_FMA4 | CPUID_EXT3_XOP |
> CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_MISALIGNSSE |
> CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | CPUID_EXT3_SVM |
> CPUID_EXT3_LAHF_LM,
> @@ -918,8 +998,10 @@ static void kvm_cpu_fill_host(x86_def_t *x86_cpu_def)
> x86_cpu_def->stepping = eax & 0x0F;
>
> x86_cpu_def->level = kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX);
> - x86_cpu_def->features = kvm_arch_get_supported_cpuid(s, 0x1, 0, R_EDX);
> - x86_cpu_def->ext_features = kvm_arch_get_supported_cpuid(s, 0x1, 0, R_ECX);
> + x86_cpu_def->features =
> + kvm_arch_get_supported_cpuid(s, 0x1, 0, R_EDX);
> + x86_cpu_def->ext_features =
> + kvm_arch_get_supported_cpuid(s, 0x1, 0, R_ECX);
>
> if (x86_cpu_def->level >= 7) {
> x86_cpu_def->cpuid_7_0_ebx_features =
> @@ -989,21 +1071,29 @@ static int kvm_check_features_against_host(X86CPU *cpu)
> uint32_t mask;
> int rv, i;
> struct model_features_t ft[] = {
> - {&env->cpuid_features, &host_def.features,
> + {&env->cpuid_features,
> + &host_def.features,
> FEAT_1_EDX },
> - {&env->cpuid_ext_features, &host_def.ext_features,
> + {&env->cpuid_ext_features,
> + &host_def.ext_features,
> FEAT_1_ECX },
> - {&env->cpuid_ext2_features, &host_def.ext2_features,
> + {&env->cpuid_ext2_features,
> + &host_def.ext2_features,
> FEAT_8000_0001_EDX },
> - {&env->cpuid_ext3_features, &host_def.ext3_features,
> + {&env->cpuid_ext3_features,
> + &host_def.ext3_features,
> FEAT_8000_0001_ECX },
> - {&env->cpuid_ext4_features, &host_def.ext4_features,
> + {&env->cpuid_ext4_features,
> + &host_def.ext4_features,
> FEAT_C000_0001_EDX },
> - {&env->cpuid_7_0_ebx_features, &host_def.cpuid_7_0_ebx_features,
> + {&env->cpuid_7_0_ebx_features,
> + &host_def.cpuid_7_0_ebx_features,
> FEAT_7_0_EBX },
> - {&env->cpuid_svm_features, &host_def.svm_features,
> + {&env->cpuid_svm_features,
> + &host_def.svm_features,
> FEAT_SVM },
> - {&env->cpuid_kvm_features, &host_def.kvm_features,
> + {&env->cpuid_kvm_features,
> + &host_def.kvm_features,
> FEAT_KVM },
> };
>
> --
> 1.8.1.4
>
--
Regards,
Igor
next prev parent reply other threads:[~2013-04-16 18:39 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-16 16:12 [Qemu-devel] [PATCH qom-cpu 0/4] replace cpuid_*features fields with a featue word array (v9) Eduardo Habkost
2013-04-16 16:12 ` [Qemu-devel] [PATCH qom-cpu 1/4] target-i386: cleanup: Group together level, xlevel, xlevel2 fields Eduardo Habkost
2013-04-16 16:12 ` [Qemu-devel] [PATCH qom-cpu 2/4] target-i386/kvm.c: Code formatting changes Eduardo Habkost
2013-04-16 16:12 ` [Qemu-devel] [PATCH qom-cpu 3/4] target-i386/cpu.c: Break lines so they don't get too long Eduardo Habkost
2013-04-16 18:39 ` Igor Mammedov [this message]
2013-04-16 16:12 ` [Qemu-devel] [PATCH qom-cpu 4/4] target-i386: Replace cpuid_*features fields with a feature word array Eduardo Habkost
2013-04-16 18:52 ` Igor Mammedov
2013-04-16 19:06 ` [Qemu-devel] [PATCH qom-cpu 4/5] bsd-user/elfload.c: Coding style fix Eduardo Habkost
2013-04-16 19:07 ` [Qemu-devel] [PATCH qom-cpu 5/5] target-i386: Replace cpuid_*features fields with a feature word array Eduardo Habkost
2013-04-16 18:54 ` [Qemu-devel] [PATCH qom-cpu 0/4] replace cpuid_*features fields with a featue word array (v9) Igor Mammedov
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