From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dan Carpenter Subject: re: drm/radeon: add radeon_atom_get_clock_dividers helper Date: Thu, 18 Apr 2013 21:47:09 +0300 Message-ID: <20130418184709.GA11596@elgon.mountain> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from userp1040.oracle.com (userp1040.oracle.com [156.151.31.81]) by gabe.freedesktop.org (Postfix) with ESMTP id A8D16E5DDB for ; Thu, 18 Apr 2013 11:47:20 -0700 (PDT) Content-Disposition: inline List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: deathsimple@vodafone.de Cc: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org Hello Christian K=F6nig, The patch 7062ab67d4c6: "drm/radeon: add radeon_atom_get_clock_dividers helper" from Apr 8, 2013, has endian bugs. drivers/gpu/drm/radeon/radeon_atombios.c 2712 if (clock_type =3D=3D COMPUTE_ENGINE_PLL_PA= RAM) { 2713 args.v3.ulClock.ulComputeClockFlag = =3D clock_type; 2714 args.v3.ulClock.ulClockFreq =3D cpu= _to_le32(clock); /* 10 khz */ ^^^^^^^^^^^ This is 24 bit bitfield so it can't store a __le32. On little endian systems it will truncate high bits away so that's ok, but on big endian it will break. 2715 = 2716 atom_execute_table(rdev->mode_info.= atom_context, index, (uint32_t *)&args); 2717 = 2718 dividers->post_div =3D args.v3.ucPo= stDiv; 2719 dividers->enable_post_div =3D (args= .v3.ucCntlFlag & 2720 ATOM_P= LL_CNTL_FLAG_PLL_POST_DIV_EN) ? true : false; There are a lot of other Sparse endian warnings but I haven't looked at them. Here is how to check: http://lwn.net/Articles/205624/ regards, dan carpenter