From: Aurelien Jarno <aurelien@aurel32.net>
To: Pavel Dovgaluk <Pavel.Dovgaluk@ispras.ru>
Cc: 'qemu-devel' <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH] i386 ROR r8/r16 instruction fix
Date: Sat, 20 Apr 2013 21:52:04 +0200 [thread overview]
Message-ID: <20130420195204.GB5000@ohm.aurel32.net> (raw)
In-Reply-To: <002401ce39a6$be6900f0$3b3b02d0$@Dovgaluk@ispras.ru>
On Mon, Apr 15, 2013 at 10:59:15AM +0400, Pavel Dovgaluk wrote:
> Fixed EFLAGS corruption by ROR r8/r16 instruction located at the end of the TB.
>
> Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@gmail.com>
> ---
> target-i386/translate.c | 1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/target-i386/translate.c b/target-i386/translate.c
> index 233f24f..40f891d 100644
> --- a/target-i386/translate.c
> +++ b/target-i386/translate.c
> @@ -1775,6 +1775,7 @@ static void gen_rot_rm_T1(DisasContext *s, int ot, int op1, int is_right)
> if (is_right) {
> tcg_gen_shri_tl(cpu_cc_src2, cpu_T[0], mask - 1);
> tcg_gen_shri_tl(cpu_cc_dst, cpu_T[0], mask);
> + tcg_gen_andi_tl(cpu_cc_dst, cpu_cc_dst, 1);
> } else {
> tcg_gen_shri_tl(cpu_cc_src2, cpu_T[0], mask);
> tcg_gen_andi_tl(cpu_cc_dst, cpu_T[0], 1);
Thanks, applied.
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
prev parent reply other threads:[~2013-04-20 19:52 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-15 6:59 [Qemu-devel] [PATCH] i386 ROR r8/r16 instruction fix Pavel Dovgaluk
2013-04-15 15:42 ` Aurelien Jarno
2013-04-17 14:14 ` Richard Henderson
2013-04-20 19:52 ` Aurelien Jarno [this message]
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