From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 04/15] drm/i915: drop adjusted_mode from *_set_pipeconf functions Date: Tue, 23 Apr 2013 18:12:57 +0300 Message-ID: <20130423151257.GG4469@intel.com> References: <1366363487-15926-1-git-send-email-daniel.vetter@ffwll.ch> <1366363487-15926-5-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 916BAE5C12 for ; Tue, 23 Apr 2013 08:13:00 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1366363487-15926-5-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Fri, Apr 19, 2013 at 11:24:36AM +0200, Daniel Vetter wrote: > They can get at the adjusted mode through intel_crtc->config. > = > Signed-off-by: Daniel Vetter Reviewed-by: Ville Syrj=E4l=E4 > --- > drivers/gpu/drm/i915/intel_display.c | 14 ++++++-------- > 1 file changed, 6 insertions(+), 8 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/= intel_display.c > index 1e6efab..8c36376 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -5151,8 +5151,7 @@ static int ironlake_get_refclk(struct drm_crtc *crt= c) > return 120000; > } > = > -static void ironlake_set_pipeconf(struct drm_crtc *crtc, > - struct drm_display_mode *adjusted_mode) > +static void ironlake_set_pipeconf(struct drm_crtc *crtc) > { > struct drm_i915_private *dev_priv =3D crtc->dev->dev_private; > struct intel_crtc *intel_crtc =3D to_intel_crtc(crtc); > @@ -5185,7 +5184,7 @@ static void ironlake_set_pipeconf(struct drm_crtc *= crtc, > val |=3D (PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_SP); > = > val &=3D ~PIPECONF_INTERLACE_MASK; > - if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) > + if (intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) > val |=3D PIPECONF_INTERLACED_ILK; > else > val |=3D PIPECONF_PROGRESSIVE; > @@ -5263,8 +5262,7 @@ static void intel_set_pipe_csc(struct drm_crtc *crt= c) > } > } > = > -static void haswell_set_pipeconf(struct drm_crtc *crtc, > - struct drm_display_mode *adjusted_mode) > +static void haswell_set_pipeconf(struct drm_crtc *crtc) > { > struct drm_i915_private *dev_priv =3D crtc->dev->dev_private; > struct intel_crtc *intel_crtc =3D to_intel_crtc(crtc); > @@ -5278,7 +5276,7 @@ static void haswell_set_pipeconf(struct drm_crtc *c= rtc, > val |=3D (PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_SP); > = > val &=3D ~PIPECONF_INTERLACE_MASK_HSW; > - if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) > + if (intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) > val |=3D PIPECONF_INTERLACED_ILK; > else > val |=3D PIPECONF_PROGRESSIVE; > @@ -5737,7 +5735,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *= crtc, > = > fdi_config_ok =3D ironlake_check_fdi_lanes(intel_crtc); > = > - ironlake_set_pipeconf(crtc, adjusted_mode); > + ironlake_set_pipeconf(crtc); > = > /* Set up the display plane register */ > I915_WRITE(DSPCNTR(plane), DISPPLANE_GAMMA_ENABLE); > @@ -5862,7 +5860,7 @@ static int haswell_crtc_mode_set(struct drm_crtc *c= rtc, > if (intel_crtc->config.has_pch_encoder) > ironlake_fdi_set_m_n(crtc); > = > - haswell_set_pipeconf(crtc, adjusted_mode); > + haswell_set_pipeconf(crtc); > = > intel_set_pipe_csc(crtc); > = > -- = > 1.7.11.7 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC