From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH v2] drm/i915: HSW: allow PCH clock gating for suspend Date: Thu, 9 May 2013 23:05:00 +0200 Message-ID: <20130509210459.GA12292@phenom.ffwll.local> References: <1366111516-27448-1-git-send-email-imre.deak@intel.com> <1366196691-25128-1-git-send-email-imre.deak@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ea0-f169.google.com (mail-ea0-f169.google.com [209.85.215.169]) by gabe.freedesktop.org (Postfix) with ESMTP id 3B624E5D32 for ; Thu, 9 May 2013 14:02:20 -0700 (PDT) Received: by mail-ea0-f169.google.com with SMTP id n15so1875004ead.28 for ; Thu, 09 May 2013 14:02:19 -0700 (PDT) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni Cc: Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Wed, Apr 17, 2013 at 04:05:10PM -0300, Paulo Zanoni wrote: > Hi > > 2013/4/17 Imre Deak : > > For the device to enter D3 we should enable PCH clock gating. > > > > v2: > > - use HAS_PCH_LPT instead of IS_HASWELL (Ville, Paolo) > > - rename lpt_allow_clock_gating to lpt_suspend_hw (Paolo) > > > > s/Paolo/Paulo/ :) > Besides this, the patch looks fine. But I can't test it right now > since suspend seems to be broken on my machine, even with nomodeset. > Reviewed-by: Paulo Zanoni Paulo poked me about this on irc, so queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch