From mboxrd@z Thu Jan 1 00:00:00 1970 From: moinejf@free.fr (Jean-Francois Moine) Date: Sat, 18 May 2013 08:56:59 +0200 Subject: [RFC 3/8] drm/i2c: nxp-tda998x: ensure VIP output mux is properly set In-Reply-To: References: <20130516192510.GV18614@n2100.arm.linux.org.uk> Message-ID: <20130518085659.40932cd8@armhf> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thu, 16 May 2013 20:26:18 +0100 Russell King wrote: > When switching between various drivers for this device, it's possible > that some critical registers are left containing values which affect > the device operation. One such case encountered is the VIP output > mux register. This defaults to 0x24 on powerup, but other drivers may > set this to 0x12. This results in incorrect colours. > > Fix this by ensuring that the register is always set to the power on > default setting. > > Signed-off-by: Russell King > --- > drivers/gpu/drm/i2c/tda998x_drv.c | 3 +++ > 1 files changed, 3 insertions(+), 0 deletions(-) > > diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c > index d71c408..4b4db95 100644 > --- a/drivers/gpu/drm/i2c/tda998x_drv.c > +++ b/drivers/gpu/drm/i2c/tda998x_drv.c > @@ -110,6 +110,7 @@ struct tda998x_priv { > #define REG_VIP_CNTRL_5 REG(0x00, 0x25) /* write */ > # define VIP_CNTRL_5_CKCASE (1 << 0) > # define VIP_CNTRL_5_SP_CNT(x) (((x) & 3) << 1) > +#define REG_MUX_VP_VIP_OUT REG(0x00, 0x27) /* read/write */ > #define REG_MAT_CONTRL REG(0x00, 0x80) /* write */ > # define MAT_CONTRL_MAT_SC(x) (((x) & 3) << 0) > # define MAT_CONTRL_MAT_BP (1 << 2) > @@ -438,6 +439,8 @@ tda998x_encoder_dpms(struct drm_encoder *encoder, int mode) > > switch (mode) { > case DRM_MODE_DPMS_ON: > + /* Write the default value MUX register */ > + reg_write(encoder, REG_MUX_VP_VIP_OUT, 0x24); > /* enable audio and video ports */ > reg_write(encoder, REG_ENA_AP, 0xff); > reg_write(encoder, REG_ENA_VP_0, 0xff); This register is never touched. Should not this setting better go at reset time (in tda998x_reset)? -- Ken ar c'henta? | ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/ From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jean-Francois Moine Subject: Re: [RFC 3/8] drm/i2c: nxp-tda998x: ensure VIP output mux is properly set Date: Sat, 18 May 2013 08:56:59 +0200 Message-ID: <20130518085659.40932cd8@armhf> References: <20130516192510.GV18614@n2100.arm.linux.org.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Russell King Cc: Jason Cooper , David Airlie , dri-devel@lists.freedesktop.org, Rob Clark , Darren Etheridge , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth List-Id: dri-devel@lists.freedesktop.org T24gVGh1LCAxNiBNYXkgMjAxMyAyMDoyNjoxOCArMDEwMApSdXNzZWxsIEtpbmcgPHJtaytrZXJu ZWxAYXJtLmxpbnV4Lm9yZy51az4gd3JvdGU6Cgo+IFdoZW4gc3dpdGNoaW5nIGJldHdlZW4gdmFy aW91cyBkcml2ZXJzIGZvciB0aGlzIGRldmljZSwgaXQncyBwb3NzaWJsZQo+IHRoYXQgc29tZSBj cml0aWNhbCByZWdpc3RlcnMgYXJlIGxlZnQgY29udGFpbmluZyB2YWx1ZXMgd2hpY2ggYWZmZWN0 Cj4gdGhlIGRldmljZSBvcGVyYXRpb24uICBPbmUgc3VjaCBjYXNlIGVuY291bnRlcmVkIGlzIHRo ZSBWSVAgb3V0cHV0Cj4gbXV4IHJlZ2lzdGVyLiAgVGhpcyBkZWZhdWx0cyB0byAweDI0IG9uIHBv d2VydXAsIGJ1dCBvdGhlciBkcml2ZXJzIG1heQo+IHNldCB0aGlzIHRvIDB4MTIuICBUaGlzIHJl c3VsdHMgaW4gaW5jb3JyZWN0IGNvbG91cnMuCj4gCj4gRml4IHRoaXMgYnkgZW5zdXJpbmcgdGhh dCB0aGUgcmVnaXN0ZXIgaXMgYWx3YXlzIHNldCB0byB0aGUgcG93ZXIgb24KPiBkZWZhdWx0IHNl dHRpbmcuCj4gCj4gU2lnbmVkLW9mZi1ieTogUnVzc2VsbCBLaW5nIDxybWsra2VybmVsQGFybS5s aW51eC5vcmcudWs+Cj4gLS0tCj4gIGRyaXZlcnMvZ3B1L2RybS9pMmMvdGRhOTk4eF9kcnYuYyB8 ICAgIDMgKysrCj4gIDEgZmlsZXMgY2hhbmdlZCwgMyBpbnNlcnRpb25zKCspLCAwIGRlbGV0aW9u cygtKQo+IAo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaTJjL3RkYTk5OHhfZHJ2LmMg Yi9kcml2ZXJzL2dwdS9kcm0vaTJjL3RkYTk5OHhfZHJ2LmMKPiBpbmRleCBkNzFjNDA4Li40YjRk Yjk1IDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pMmMvdGRhOTk4eF9kcnYuYwo+ICsr KyBiL2RyaXZlcnMvZ3B1L2RybS9pMmMvdGRhOTk4eF9kcnYuYwo+IEBAIC0xMTAsNiArMTEwLDcg QEAgc3RydWN0IHRkYTk5OHhfcHJpdiB7Cj4gICNkZWZpbmUgUkVHX1ZJUF9DTlRSTF81ICAgICAg ICAgICBSRUcoMHgwMCwgMHgyNSkgICAgIC8qIHdyaXRlICovCj4gICMgZGVmaW5lIFZJUF9DTlRS TF81X0NLQ0FTRSAgICAgICAoMSA8PCAwKQo+ICAjIGRlZmluZSBWSVBfQ05UUkxfNV9TUF9DTlQo eCkgICAgKCgoeCkgJiAzKSA8PCAxKQo+ICsjZGVmaW5lIFJFR19NVVhfVlBfVklQX09VVCAgICAg ICAgUkVHKDB4MDAsIDB4MjcpICAgICAvKiByZWFkL3dyaXRlICovCj4gICNkZWZpbmUgUkVHX01B VF9DT05UUkwgICAgICAgICAgICBSRUcoMHgwMCwgMHg4MCkgICAgIC8qIHdyaXRlICovCj4gICMg ZGVmaW5lIE1BVF9DT05UUkxfTUFUX1NDKHgpICAgICAoKCh4KSAmIDMpIDw8IDApCj4gICMgZGVm aW5lIE1BVF9DT05UUkxfTUFUX0JQICAgICAgICAoMSA8PCAyKQo+IEBAIC00MzgsNiArNDM5LDgg QEAgdGRhOTk4eF9lbmNvZGVyX2RwbXMoc3RydWN0IGRybV9lbmNvZGVyICplbmNvZGVyLCBpbnQg bW9kZSkKPiAgCj4gIAlzd2l0Y2ggKG1vZGUpIHsKPiAgCWNhc2UgRFJNX01PREVfRFBNU19PTjoK PiArCQkvKiBXcml0ZSB0aGUgZGVmYXVsdCB2YWx1ZSBNVVggcmVnaXN0ZXIgKi8KPiArCQlyZWdf d3JpdGUoZW5jb2RlciwgUkVHX01VWF9WUF9WSVBfT1VULCAweDI0KTsKPiAgCQkvKiBlbmFibGUg YXVkaW8gYW5kIHZpZGVvIHBvcnRzICovCj4gIAkJcmVnX3dyaXRlKGVuY29kZXIsIFJFR19FTkFf QVAsIDB4ZmYpOwo+ICAJCXJlZ193cml0ZShlbmNvZGVyLCBSRUdfRU5BX1ZQXzAsIDB4ZmYpOwoK VGhpcyByZWdpc3RlciBpcyBuZXZlciB0b3VjaGVkLiBTaG91bGQgbm90IHRoaXMgc2V0dGluZyBi ZXR0ZXIgZ28gYXQKcmVzZXQgdGltZSAoaW4gdGRhOTk4eF9yZXNldCk/CgotLSAKS2VuIGFyIGMn aGVudGHDsQl8CSAgICAgICoqIEJyZWl6aCBoYSBMaW51eCBhdGF2ISAqKgpKZWYJCXwJCWh0dHA6 Ly9tb2luZWpmLmZyZWUuZnIvCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fXwpsaW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVs QGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9s aXN0aW5mby9saW51eC1hcm0ta2VybmVsCg==