From mboxrd@z Thu Jan  1 00:00:00 1970
From: Egbert Eich <eich@freedesktop.org>
Subject: Re: [PATCH 2/6] drm/i915: Always enable the cursor
 right after the primary plane
Date: Tue, 21 May 2013 17:17:27 +0200
Message-ID: <20130521151726.GG17947@debian>
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On Wed, May 08, 2013 at 12:50:24PM +0300, ville.syrjala@linux.intel.com wro=
te:
> From: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>
> =

> Follow the same sequence when enabling the cursor plane during
> modeset. No point in doing this stuff in different order on different
> generations.
> =

> This should also avoid a needless wait for vblank for the g4x cursor
> workaround when the cursor gets enabled anyway.
> =

> Signed-off-by: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 10 ++++------
>  1 file changed, 4 insertions(+), 6 deletions(-)
> =

> @@ -3727,6 +3725,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
>  =

>  	intel_enable_pipe(dev_priv, pipe, false);
>  	intel_enable_plane(dev_priv, plane, pipe);
> +	intel_crtc_update_cursor(crtc, true);
>  	if (IS_G4X(dev))
>  		g4x_fixup_plane(dev_priv, pipe);
>  =


As discussed on IRC this may interfere with =


commit 61bc95c1fbbb6a08b55bbe161fdf1ea5493fc595
Author: Egbert Eich <eich@suse.com>
Date:   Mon Mar 4 09:24:38 2013 -0500

    DRM/i915: On G45 enable cursor plane briefly after enabling the display=
 plane.

described in https://bugs.freedesktop.org/show_bug.cgi?id=3D61457

I cannot test on the affected hardware as it's not available to
me at the moment. If Ville's G4x doesn't show the issue I will =

test this next time I have access to the HW in question.
Therefore:

Acked-by: Egbert Eich <eich@suse.com>

Cheers,
	Egbert.