From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>,
intel-gfx <intel-gfx@lists.freedesktop.org>,
Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH] drm/i915: Haswell FBC supports up to 4096x4096
Date: Fri, 24 May 2013 14:09:57 +0300 [thread overview]
Message-ID: <20130524110957.GG5004@intel.com> (raw)
In-Reply-To: <CAKMK7uGExfiEMsRJZHM-Fv4XudA=71bwdvLRDULj=fCZmETOrA@mail.gmail.com>
On Fri, May 24, 2013 at 01:41:22AM +0200, Daniel Vetter wrote:
> On Thu, May 23, 2013 at 11:30 PM, Paulo Zanoni <przanoni@gmail.com> wrote:
> > From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> >
> > But only the first 2048 lines will be compressed. No problem.
> >
> > With this I can finally see FBC on my 2560x1440 DP monitor, which
> > gives me a boost on the PC7 residency.
> >
> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> After some extensive doc hunting I believe that cantiga and ilk+ have
> a limit of 2048 lines by 4048 pixels wide (this is the fbc2 limit).
Where does 4048 come from? I only see 4K mentioned in all the docs.
Other mismatches we have:
- fbc2 supports interlaced scan (we disable fbc w/ interlaced modes)
- 16bpp and 32bpp formats (for 16bpp ratio must be configured to 1/2)
We don't check the bpp at all currently, so I assume something bad
would happend w/ 8bpp and 16bpp.
The ctg docs also has some other things to say:
- No sprite + fbc on the same pipe
- only 32bpp support (it's a bit unclear actually since it still lists
the compressions ratio settings for 16bpp).
- "Can only be enabled when output is to a local panel at the native
resolution"
Not sure what this means in practice. No pfit?
- pixel multiplier needs to be 1
Additional fbc1 limits we don't seem to check:
- gen3: pitch must be 4K or 8K
gen4: pitch must be 2k-16k
- fb width % 8 = 0, fb height % 2 = 0. I guess we may not have to worry
about these since the compression is lossless and thus we can afford
to compress in some garbage from outside the viewport.
- The docs also list 640x480 as the minimum size. I have a bit of a
hard time believing that this limit would actually be real. Maybe
the spec author just thought that 640x480 is the smallest mode anyone
would ever use and wrote it down. But I could be wrong.
> Original fbc (on gen2/3/crestline) has the limits currently in our
> code. Can you please amend your patch to include this?
> -Daniel
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
next prev parent reply other threads:[~2013-05-24 11:10 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-23 21:30 [PATCH] drm/i915: Haswell FBC supports up to 4096x4096 Paulo Zanoni
2013-05-23 23:41 ` Daniel Vetter
2013-05-24 11:09 ` Ville Syrjälä [this message]
2013-06-03 21:15 ` [PATCH] drm/i915: update FBC maximum fb sizes Paulo Zanoni
2013-06-04 17:40 ` Daniel Vetter
2013-06-04 17:46 ` Paulo Zanoni
2013-06-04 17:57 ` Ville Syrjälä
2013-06-04 19:53 ` Paulo Zanoni
2013-06-06 13:19 ` Daniel Vetter
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