diff for duplicates of <20130530190638.4470.74710@quantum> diff --git a/a/1.txt b/N1/1.txt index 0037372..2de562f 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,17 +1,17 @@ Quoting Linus Walleij (2013-05-23 10:31:27) -> From: Linus Walleij <linus.walleij@linaro.org> +> From: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> > > This moves the slow, fast, AHB bridge and "rest" clocks on > the U300 system controller over to registration from the > device tree. > -> Cc: Mike Turquette <mturquette@linaro.org> -> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> +> Cc: Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> +> Signed-off-by: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> > --- > Hi Mike, I'm seeking an ACK to take this patch through the > ARM SoC tree. -Acked-by: Mike Turquette <mturquette@linaro.org> +Acked-by: Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> > --- > .../bindings/clock/ste-u300-syscon-clock.txt | 57 ++++ @@ -71,7 +71,7 @@ Acked-by: Mike Turquette <mturquette@linaro.org> > + > +Example: > + -> +gpio_clk: gpio_clk at 13M { +> +gpio_clk: gpio_clk@13M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <0>; /* Slow */ @@ -79,7 +79,7 @@ Acked-by: Mike Turquette <mturquette@linaro.org> > + clocks = <&slow_clk>; > +}; > + -> +gpio: gpio at c0016000 { +> +gpio: gpio@c0016000 { > + compatible = "stericsson,gpio-coh901"; > + (...) > + clocks = <&gpio_clk>; @@ -93,77 +93,77 @@ Acked-by: Mike Turquette <mturquette@linaro.org> > clock-frequency = <13000000>; > }; > + /* Slow bridge clocks under PLL13 */ -> + slow_clk: slow_clk at 13M { +> + slow_clk: slow_clk@13M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <0>; /* Slow */ > + clock-id = <0>; > + clocks = <&pll13>; > + }; -> + uart0_clk: uart0_clk at 13M { +> + uart0_clk: uart0_clk@13M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <0>; /* Slow */ > + clock-id = <1>; > + clocks = <&slow_clk>; > + }; -> + gpio_clk: gpio_clk at 13M { +> + gpio_clk: gpio_clk@13M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <0>; /* Slow */ > + clock-id = <4>; > + clocks = <&slow_clk>; > + }; -> + rtc_clk: rtc_clk at 13M { +> + rtc_clk: rtc_clk@13M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <0>; /* Slow */ > + clock-id = <6>; > + clocks = <&slow_clk>; > + }; -> + apptimer_clk: app_tmr_clk at 13M { +> + apptimer_clk: app_tmr_clk@13M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <0>; /* Slow */ > + clock-id = <7>; > + clocks = <&slow_clk>; > + }; -> + acc_tmr_clk at 13M { +> + acc_tmr_clk@13M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <0>; /* Slow */ > + clock-id = <8>; > + clocks = <&slow_clk>; > + }; -> pll208: pll208 at 208M { +> pll208: pll208@208M { > #clock-cells = <0>; > compatible = "fixed-clock"; > @@ -55,6 +98,13 @@ > clock-mult = <1>; > clocks = <&pll208>; > }; -> + cpu_clk at 208M { +> + cpu_clk@208M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <2>; /* Rest */ > + clock-id = <3>; > + clocks = <&app208>; > + }; -> app104: app_104_clk at 104M { +> app104: app_104_clk@104M { > #clock-cells = <0>; > compatible = "fixed-factor-clock"; > @@ -62,6 +112,13 @@ > clock-mult = <1>; > clocks = <&pll208>; > }; -> + semi_clk at 104M { +> + semi_clk@104M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <2>; /* Rest */ > + clock-id = <9>; > + clocks = <&app104>; > + }; -> app52: app_52_clk at 52M { +> app52: app_52_clk@52M { > #clock-cells = <0>; > compatible = "fixed-factor-clock"; > @@ -69,6 +126,49 @@ @@ -171,49 +171,49 @@ Acked-by: Mike Turquette <mturquette@linaro.org> > clocks = <&pll208>; > }; > + /* AHB subsystem clocks */ -> + ahb_clk: ahb_subsys_clk at 52M { +> + ahb_clk: ahb_subsys_clk@52M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <2>; /* Rest */ > + clock-id = <10>; > + clocks = <&app52>; > + }; -> + intcon_clk at 52M { +> + intcon_clk@52M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <2>; /* Rest */ > + clock-id = <12>; > + clocks = <&ahb_clk>; > + }; -> + emif_clk at 52M { +> + emif_clk@52M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <2>; /* Rest */ > + clock-id = <5>; > + clocks = <&ahb_clk>; > + }; -> + dmac_clk: dmac_clk at 52M { +> + dmac_clk: dmac_clk@52M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <2>; /* Rest */ > + clock-id = <4>; > + clocks = <&app52>; > + }; -> + fsmc_clk: fsmc_clk at 52M { +> + fsmc_clk: fsmc_clk@52M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <2>; /* Rest */ > + clock-id = <6>; > + clocks = <&app52>; > + }; -> + xgam_clk: xgam_clk at 52M { +> + xgam_clk: xgam_clk@52M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <2>; /* Rest */ > + clock-id = <8>; > + clocks = <&app52>; > + }; -> app26: app_26_clk at 26M { +> app26: app_26_clk@26M { > #clock-cells = <0>; > compatible = "fixed-factor-clock"; > @@ -76,6 +176,42 @@ @@ -221,35 +221,35 @@ Acked-by: Mike Turquette <mturquette@linaro.org> > clocks = <&app52>; > }; > + /* Fast bridge clocks */ -> + fast_clk: fast_clk at 26M { +> + fast_clk: fast_clk@26M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <1>; /* Fast */ > + clock-id = <0>; > + clocks = <&app26>; > + }; -> + i2c0_clk: i2c0_clk at 26M { +> + i2c0_clk: i2c0_clk@26M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <1>; /* Fast */ > + clock-id = <1>; > + clocks = <&fast_clk>; > + }; -> + i2c1_clk: i2c1_clk at 26M { +> + i2c1_clk: i2c1_clk@26M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <1>; /* Fast */ > + clock-id = <2>; > + clocks = <&fast_clk>; > + }; -> + mmc_pclk: mmc_p_clk at 26M { +> + mmc_pclk: mmc_p_clk@26M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <1>; /* Fast */ > + clock-id = <5>; > + clocks = <&fast_clk>; > + }; -> + spi_clk: spi_p_clk at 26M { +> + spi_clk: spi_p_clk@26M { > + #clock-cells = <0>; > + compatible = "stericsson,u300-syscon-clk"; > + clock-type = <1>; /* Fast */ @@ -258,7 +258,7 @@ Acked-by: Mike Turquette <mturquette@linaro.org> > + }; > }; > -> timer: timer at c0014000 { +> timer: timer@c0014000 { > @@ -83,6 +219,7 @@ > reg = <0xc0014000 0x1000>; > interrupt-parent = <&vica>; @@ -266,7 +266,7 @@ Acked-by: Mike Turquette <mturquette@linaro.org> > + clocks = <&apptimer_clk>; > }; > -> gpio: gpio at c0016000 { +> gpio: gpio@c0016000 { > @@ -90,6 +227,7 @@ > reg = <0xc0016000 0x1000>; > interrupt-parent = <&vicb>; @@ -282,7 +282,7 @@ Acked-by: Mike Turquette <mturquette@linaro.org> > + clocks = <&rtc_clk>; > }; > -> dmac: dma-controller at c00020000 { +> dmac: dma-controller@c00020000 { > @@ -125,6 +264,7 @@ > interrupts = <2>; > #dma-cells = <1>; @@ -297,7 +297,7 @@ Acked-by: Mike Turquette <mturquette@linaro.org> > nand-skip-bbtscan; > + clocks = <&fsmc_clk>; > -> partition at 0 { +> partition@0 { > label = "boot records"; > @@ -158,6 +299,7 @@ > reg = <0xc0004000 0x1000>; @@ -306,7 +306,7 @@ Acked-by: Mike Turquette <mturquette@linaro.org> > + clocks = <&i2c0_clk>; > #address-cells = <1>; > #size-cells = <0>; -> ab3100: ab3100 at 0x48 { +> ab3100: ab3100@0x48 { > @@ -235,6 +377,7 @@ > reg = <0xc0005000 0x1000>; > interrupt-parent = <&vicb>; @@ -314,7 +314,7 @@ Acked-by: Mike Turquette <mturquette@linaro.org> > + clocks = <&i2c1_clk>; > #address-cells = <1>; > #size-cells = <0>; -> fwcam0: fwcam at 0x10 { +> fwcam0: fwcam@0x10 { > @@ -270,6 +413,8 @@ > reg = <0xc0013000 0x1000>; > interrupt-parent = <&vica>; diff --git a/a/content_digest b/N1/content_digest index a2d9d28..8bec053 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,25 +1,29 @@ "ref\01369330288-14856-1-git-send-email-linus.walleij@stericsson.com\0" "ref\01369330288-14856-6-git-send-email-linus.walleij@stericsson.com\0" - "From\0mturquette@linaro.org (Mike Turquette)\0" - "Subject\0[PATCH 5/6] ARM: u300: move the gated system controller clocks to DT\0" + "ref\01369330288-14856-6-git-send-email-linus.walleij-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org\0" + "From\0Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0" + "Subject\0Re: [PATCH 5/6] ARM: u300: move the gated system controller clocks to DT\0" "Date\0Thu, 30 May 2013 12:06:38 -0700\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Linus Walleij <linus.walleij-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org>" + linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + " Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" + "Cc\0devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org\0" "\00:1\0" "b\0" "Quoting Linus Walleij (2013-05-23 10:31:27)\n" - "> From: Linus Walleij <linus.walleij@linaro.org>\n" + "> From: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\n" "> \n" "> This moves the slow, fast, AHB bridge and \"rest\" clocks on\n" "> the U300 system controller over to registration from the\n" "> device tree.\n" "> \n" - "> Cc: Mike Turquette <mturquette@linaro.org>\n" - "> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>\n" + "> Cc: Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\n" + "> Signed-off-by: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\n" "> ---\n" "> Hi Mike, I'm seeking an ACK to take this patch through the\n" "> ARM SoC tree.\n" "\n" - "Acked-by: Mike Turquette <mturquette@linaro.org>\n" + "Acked-by: Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\n" "\n" "> ---\n" "> .../bindings/clock/ste-u300-syscon-clock.txt | 57 ++++\n" @@ -79,7 +83,7 @@ "> +\n" "> +Example:\n" "> +\n" - "> +gpio_clk: gpio_clk at 13M {\n" + "> +gpio_clk: gpio_clk@13M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <0>; /* Slow */\n" @@ -87,7 +91,7 @@ "> + clocks = <&slow_clk>;\n" "> +};\n" "> +\n" - "> +gpio: gpio at c0016000 {\n" + "> +gpio: gpio@c0016000 {\n" "> + compatible = \"stericsson,gpio-coh901\";\n" "> + (...)\n" "> + clocks = <&gpio_clk>;\n" @@ -101,77 +105,77 @@ "> clock-frequency = <13000000>;\n" "> };\n" "> + /* Slow bridge clocks under PLL13 */\n" - "> + slow_clk: slow_clk at 13M {\n" + "> + slow_clk: slow_clk@13M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <0>; /* Slow */\n" "> + clock-id = <0>;\n" "> + clocks = <&pll13>;\n" "> + };\n" - "> + uart0_clk: uart0_clk at 13M {\n" + "> + uart0_clk: uart0_clk@13M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <0>; /* Slow */\n" "> + clock-id = <1>;\n" "> + clocks = <&slow_clk>;\n" "> + };\n" - "> + gpio_clk: gpio_clk at 13M {\n" + "> + gpio_clk: gpio_clk@13M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <0>; /* Slow */\n" "> + clock-id = <4>;\n" "> + clocks = <&slow_clk>;\n" "> + };\n" - "> + rtc_clk: rtc_clk at 13M {\n" + "> + rtc_clk: rtc_clk@13M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <0>; /* Slow */\n" "> + clock-id = <6>;\n" "> + clocks = <&slow_clk>;\n" "> + };\n" - "> + apptimer_clk: app_tmr_clk at 13M {\n" + "> + apptimer_clk: app_tmr_clk@13M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <0>; /* Slow */\n" "> + clock-id = <7>;\n" "> + clocks = <&slow_clk>;\n" "> + };\n" - "> + acc_tmr_clk at 13M {\n" + "> + acc_tmr_clk@13M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <0>; /* Slow */\n" "> + clock-id = <8>;\n" "> + clocks = <&slow_clk>;\n" "> + };\n" - "> pll208: pll208 at 208M {\n" + "> pll208: pll208@208M {\n" "> #clock-cells = <0>;\n" "> compatible = \"fixed-clock\";\n" "> @@ -55,6 +98,13 @@\n" "> clock-mult = <1>;\n" "> clocks = <&pll208>;\n" "> };\n" - "> + cpu_clk at 208M {\n" + "> + cpu_clk@208M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <2>; /* Rest */\n" "> + clock-id = <3>;\n" "> + clocks = <&app208>;\n" "> + };\n" - "> app104: app_104_clk at 104M {\n" + "> app104: app_104_clk@104M {\n" "> #clock-cells = <0>;\n" "> compatible = \"fixed-factor-clock\";\n" "> @@ -62,6 +112,13 @@\n" "> clock-mult = <1>;\n" "> clocks = <&pll208>;\n" "> };\n" - "> + semi_clk at 104M {\n" + "> + semi_clk@104M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <2>; /* Rest */\n" "> + clock-id = <9>;\n" "> + clocks = <&app104>;\n" "> + };\n" - "> app52: app_52_clk at 52M {\n" + "> app52: app_52_clk@52M {\n" "> #clock-cells = <0>;\n" "> compatible = \"fixed-factor-clock\";\n" "> @@ -69,6 +126,49 @@\n" @@ -179,49 +183,49 @@ "> clocks = <&pll208>;\n" "> };\n" "> + /* AHB subsystem clocks */\n" - "> + ahb_clk: ahb_subsys_clk at 52M {\n" + "> + ahb_clk: ahb_subsys_clk@52M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <2>; /* Rest */\n" "> + clock-id = <10>;\n" "> + clocks = <&app52>;\n" "> + };\n" - "> + intcon_clk at 52M {\n" + "> + intcon_clk@52M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <2>; /* Rest */\n" "> + clock-id = <12>;\n" "> + clocks = <&ahb_clk>;\n" "> + };\n" - "> + emif_clk at 52M {\n" + "> + emif_clk@52M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <2>; /* Rest */\n" "> + clock-id = <5>;\n" "> + clocks = <&ahb_clk>;\n" "> + };\n" - "> + dmac_clk: dmac_clk at 52M {\n" + "> + dmac_clk: dmac_clk@52M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <2>; /* Rest */\n" "> + clock-id = <4>;\n" "> + clocks = <&app52>;\n" "> + };\n" - "> + fsmc_clk: fsmc_clk at 52M {\n" + "> + fsmc_clk: fsmc_clk@52M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <2>; /* Rest */\n" "> + clock-id = <6>;\n" "> + clocks = <&app52>;\n" "> + };\n" - "> + xgam_clk: xgam_clk at 52M {\n" + "> + xgam_clk: xgam_clk@52M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <2>; /* Rest */\n" "> + clock-id = <8>;\n" "> + clocks = <&app52>;\n" "> + };\n" - "> app26: app_26_clk at 26M {\n" + "> app26: app_26_clk@26M {\n" "> #clock-cells = <0>;\n" "> compatible = \"fixed-factor-clock\";\n" "> @@ -76,6 +176,42 @@\n" @@ -229,35 +233,35 @@ "> clocks = <&app52>;\n" "> };\n" "> + /* Fast bridge clocks */\n" - "> + fast_clk: fast_clk at 26M {\n" + "> + fast_clk: fast_clk@26M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <1>; /* Fast */\n" "> + clock-id = <0>;\n" "> + clocks = <&app26>;\n" "> + };\n" - "> + i2c0_clk: i2c0_clk at 26M {\n" + "> + i2c0_clk: i2c0_clk@26M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <1>; /* Fast */\n" "> + clock-id = <1>;\n" "> + clocks = <&fast_clk>;\n" "> + };\n" - "> + i2c1_clk: i2c1_clk at 26M {\n" + "> + i2c1_clk: i2c1_clk@26M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <1>; /* Fast */\n" "> + clock-id = <2>;\n" "> + clocks = <&fast_clk>;\n" "> + };\n" - "> + mmc_pclk: mmc_p_clk at 26M {\n" + "> + mmc_pclk: mmc_p_clk@26M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <1>; /* Fast */\n" "> + clock-id = <5>;\n" "> + clocks = <&fast_clk>;\n" "> + };\n" - "> + spi_clk: spi_p_clk at 26M {\n" + "> + spi_clk: spi_p_clk@26M {\n" "> + #clock-cells = <0>;\n" "> + compatible = \"stericsson,u300-syscon-clk\";\n" "> + clock-type = <1>; /* Fast */\n" @@ -266,7 +270,7 @@ "> + };\n" "> };\n" "> \n" - "> timer: timer at c0014000 {\n" + "> timer: timer@c0014000 {\n" "> @@ -83,6 +219,7 @@\n" "> reg = <0xc0014000 0x1000>;\n" "> interrupt-parent = <&vica>;\n" @@ -274,7 +278,7 @@ "> + clocks = <&apptimer_clk>;\n" "> };\n" "> \n" - "> gpio: gpio at c0016000 {\n" + "> gpio: gpio@c0016000 {\n" "> @@ -90,6 +227,7 @@\n" "> reg = <0xc0016000 0x1000>;\n" "> interrupt-parent = <&vicb>;\n" @@ -290,7 +294,7 @@ "> + clocks = <&rtc_clk>;\n" "> };\n" "> \n" - "> dmac: dma-controller at c00020000 {\n" + "> dmac: dma-controller@c00020000 {\n" "> @@ -125,6 +264,7 @@\n" "> interrupts = <2>;\n" "> #dma-cells = <1>;\n" @@ -305,7 +309,7 @@ "> nand-skip-bbtscan;\n" "> + clocks = <&fsmc_clk>;\n" "> \n" - "> partition at 0 {\n" + "> partition@0 {\n" "> label = \"boot records\";\n" "> @@ -158,6 +299,7 @@\n" "> reg = <0xc0004000 0x1000>;\n" @@ -314,7 +318,7 @@ "> + clocks = <&i2c0_clk>;\n" "> #address-cells = <1>;\n" "> #size-cells = <0>;\n" - "> ab3100: ab3100 at 0x48 {\n" + "> ab3100: ab3100@0x48 {\n" "> @@ -235,6 +377,7 @@\n" "> reg = <0xc0005000 0x1000>;\n" "> interrupt-parent = <&vicb>;\n" @@ -322,7 +326,7 @@ "> + clocks = <&i2c1_clk>;\n" "> #address-cells = <1>;\n" "> #size-cells = <0>;\n" - "> fwcam0: fwcam at 0x10 {\n" + "> fwcam0: fwcam@0x10 {\n" "> @@ -270,6 +413,8 @@\n" "> reg = <0xc0013000 0x1000>;\n" "> interrupt-parent = <&vica>;\n" @@ -711,4 +715,4 @@ "> -- \n" > 1.7.11.3 -0c96bd73fb74e0004e1e52c11424a3bfc23bb9f16f2fb16d0ba2b933e24ada1f +b8f9fde846938889844de75d1a2bc25664948b6eed9dceee11c98c6d74d3f68b
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.