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From: Anton Blanchard <anton@samba.org>
To: david@gibson.dropbear.id.au, agraf@suse.de, rth@twiddle.net,
	aurelien@aurel32.net
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 2/4] tcg-ppc64: bswap64 rotates output 32 bits
Date: Sun, 2 Jun 2013 22:28:27 +1000	[thread overview]
Message-ID: <20130602222827.620d5762@kryten> (raw)
In-Reply-To: <20130602222452.1b0fdbd1@kryten>


If our input and output is in the same register, bswap64 tries to
undo a rotate of the input. This just ends up rotating the output.

Cc: qemu-stable@nongnu.org
Signed-off-by: Anton Blanchard <anton@samba.org>
---

diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 0fcf2b5..64fb0af 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -1922,8 +1922,6 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc, const TCGArg *args,
 
         if (a0 == 0) {
             tcg_out_mov(s, TCG_TYPE_I64, args[0], a0);
-            /* Revert the source rotate that we performed above.  */
-            tcg_out_rld(s, RLDICL, a1, a1, 32, 0);
         }
         break;
 

  parent reply	other threads:[~2013-06-02 12:51 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-06-02 12:24 [Qemu-devel] [PATCH 0/4] Fix ppc64 tcg issues Anton Blanchard
2013-06-02 12:27 ` [Qemu-devel] [PATCH 1/4] tcg-ppc64: Fix RLDCL opcode Anton Blanchard
2013-06-03 14:28   ` Richard Henderson
2013-06-11 11:19     ` Anton Blanchard
2013-06-11 13:49       ` Richard Henderson
2013-06-02 12:28 ` Anton Blanchard [this message]
2013-06-03 14:31   ` [Qemu-devel] [PATCH 2/4] tcg-ppc64: bswap64 rotates output 32 bits Richard Henderson
2013-06-02 12:29 ` [Qemu-devel] [PATCH 3/4] tcg-ppc64: Fix add2_i64 Anton Blanchard
2013-06-03 14:32   ` Richard Henderson
2013-06-02 12:30 ` [Qemu-devel] [PATCH 4/4] tcg-ppc64: rotr_i32 rotates wrong amount Anton Blanchard
2013-06-03 14:33   ` Richard Henderson

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