From mboxrd@z Thu Jan 1 00:00:00 1970 From: heiko@sntech.de (Heiko =?utf-8?q?St=C3=BCbner?=) Date: Mon, 3 Jun 2013 22:15:45 +0200 Subject: [PATCH RFC 2/3] clk: dt: binding for basic multiplexor clock In-Reply-To: <20130603200722.6077.85426@quantum> References: <1370281990-15090-1-git-send-email-mturquette@linaro.org> <201306032133.20039.heiko@sntech.de> <20130603200722.6077.85426@quantum> Message-ID: <201306032215.45983.heiko@sntech.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Am Montag, 3. Juni 2013, 22:07:22 schrieb Mike Turquette: > Quoting Heiko St?bner (2013-06-03 12:33:19) > > > Hi Mike, > > > > I think it's a multiplexEr clock in the patch title, and see below > > Doh, you are right. But "xor" is so much cooler looking than "xer"... > > > Am Montag, 3. Juni 2013, 19:53:09 schrieb Mike Turquette: > > > Device Tree binding for the basic clock multiplexor, plus the setup > > > function to register the clock. Based on the existing fixed-clock > > > binding. > > > > > > Also relocate declaration of of_fixed_factor_clk_setup to keep things > > > tidy. > > > > > > Signed-off-by: Mike Turquette > > > > [...] > > > > > + > > > + reg = of_iomap(node, 0); > > > + pr_err("%s: reg is 0x%p\n", __func__, reg); > > > + > > > + if (of_property_read_u32(node, "mask", &mask)) { > > > + pr_err("%s: missing mask property for %s\n", __func__, > > > node->name); + return; > > > + } > > > + > > > + if (of_property_read_u32(node, "shift", &shift)) > > > + pr_debug("%s: missing shift property defaults to zero for > > > %s\n", + __func__, node->name); > > > + > > > + if (of_property_read_bool(node, "index_one")) > > > + clk_mux_flags |= CLK_MUX_INDEX_ONE; > > > + > > > + clk = clk_register_mux_table(NULL, clk_name, parent_names, > > > num_parents, + 0, reg, 0, mask, clk_mux_flags, > > > > > ^- should probably be shift > > > > Otherwise looks cool and I'm currently trying it with my Rockchip code. > > Right again. My test platform seems to not shift the mask at all so > this did not cause a visible bug for me. I'm currently converting my rockchip stuff to it, as it would solve a lot of problems with the numerous clock types I'm defining just to put the shift and mask values somewhere. So lets see if anything more turns up ;-) From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiko =?utf-8?q?St=C3=BCbner?= Subject: Re: [PATCH RFC 2/3] clk: dt: binding for basic multiplexor clock Date: Mon, 3 Jun 2013 22:15:45 +0200 Message-ID: <201306032215.45983.heiko@sntech.de> References: <1370281990-15090-1-git-send-email-mturquette@linaro.org> <201306032133.20039.heiko@sntech.de> <20130603200722.6077.85426@quantum> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20130603200722.6077.85426@quantum> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org Sender: "devicetree-discuss" To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org, Mike Turquette , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org QW0gTW9udGFnLCAzLiBKdW5pIDIwMTMsIDIyOjA3OjIyIHNjaHJpZWIgTWlrZSBUdXJxdWV0dGU6 Cj4gUXVvdGluZyBIZWlrbyBTdMO8Ym5lciAoMjAxMy0wNi0wMyAxMjozMzoxOSkKPiAKPiA+IEhp IE1pa2UsCj4gPiAKPiA+IEkgdGhpbmsgaXQncyBhIG11bHRpcGxleEVyIGNsb2NrIGluIHRoZSBw YXRjaCB0aXRsZSwgYW5kIHNlZSBiZWxvdwo+IAo+IERvaCwgeW91IGFyZSByaWdodC4gIEJ1dCAi eG9yIiBpcyBzbyBtdWNoIGNvb2xlciBsb29raW5nIHRoYW4gInhlciIuLi4KPiAKPiA+IEFtIE1v bnRhZywgMy4gSnVuaSAyMDEzLCAxOTo1MzowOSBzY2hyaWViIE1pa2UgVHVycXVldHRlOgo+ID4g PiBEZXZpY2UgVHJlZSBiaW5kaW5nIGZvciB0aGUgYmFzaWMgY2xvY2sgbXVsdGlwbGV4b3IsIHBs dXMgdGhlIHNldHVwCj4gPiA+IGZ1bmN0aW9uIHRvIHJlZ2lzdGVyIHRoZSBjbG9jay4gIEJhc2Vk IG9uIHRoZSBleGlzdGluZyBmaXhlZC1jbG9jawo+ID4gPiBiaW5kaW5nLgo+ID4gPiAKPiA+ID4g QWxzbyByZWxvY2F0ZSBkZWNsYXJhdGlvbiBvZiBvZl9maXhlZF9mYWN0b3JfY2xrX3NldHVwIHRv IGtlZXAgdGhpbmdzCj4gPiA+IHRpZHkuCj4gPiA+IAo+ID4gPiBTaWduZWQtb2ZmLWJ5OiBNaWtl IFR1cnF1ZXR0ZSA8bXR1cnF1ZXR0ZUBsaW5hcm8ub3JnPgo+ID4gCj4gPiBbLi4uXQo+ID4gCj4g PiA+ICsKPiA+ID4gKyAgICAgcmVnID0gb2ZfaW9tYXAobm9kZSwgMCk7Cj4gPiA+ICsgICAgIHBy X2VycigiJXM6IHJlZyBpcyAweCVwXG4iLCBfX2Z1bmNfXywgcmVnKTsKPiA+ID4gKwo+ID4gPiAr ICAgICBpZiAob2ZfcHJvcGVydHlfcmVhZF91MzIobm9kZSwgIm1hc2siLCAmbWFzaykpIHsKPiA+ ID4gKyAgICAgICAgICAgICBwcl9lcnIoIiVzOiBtaXNzaW5nIG1hc2sgcHJvcGVydHkgZm9yICVz XG4iLCBfX2Z1bmNfXywKPiA+ID4gbm9kZS0+bmFtZSk7ICsgICAgICAgICAgICAgcmV0dXJuOwo+ ID4gPiArICAgICB9Cj4gPiA+ICsKPiA+ID4gKyAgICAgaWYgKG9mX3Byb3BlcnR5X3JlYWRfdTMy KG5vZGUsICJzaGlmdCIsICZzaGlmdCkpCj4gPiA+ICsgICAgICAgICAgICAgcHJfZGVidWcoIiVz OiBtaXNzaW5nIHNoaWZ0IHByb3BlcnR5IGRlZmF1bHRzIHRvIHplcm8gZm9yCj4gPiA+ICVzXG4i LCArICAgICAgICAgICAgICAgICAgICAgICAgICAgICBfX2Z1bmNfXywgbm9kZS0+bmFtZSk7Cj4g PiA+ICsKPiA+ID4gKyAgICAgaWYgKG9mX3Byb3BlcnR5X3JlYWRfYm9vbChub2RlLCAiaW5kZXhf b25lIikpCj4gPiA+ICsgICAgICAgICAgICAgY2xrX211eF9mbGFncyB8PSBDTEtfTVVYX0lOREVY X09ORTsKPiA+ID4gKwo+ID4gPiArICAgICBjbGsgPSBjbGtfcmVnaXN0ZXJfbXV4X3RhYmxlKE5V TEwsIGNsa19uYW1lLCBwYXJlbnRfbmFtZXMsCj4gPiA+IG51bV9wYXJlbnRzLCArICAgICAgICAg ICAgICAgICAgICAgMCwgcmVnLCAwLCBtYXNrLCBjbGtfbXV4X2ZsYWdzLAo+ID4gPiAKPiA+ICAg ICAgICAgICAgICAgICAgICAgICBeLSBzaG91bGQgcHJvYmFibHkgYmUgc2hpZnQKPiA+IAo+ID4g T3RoZXJ3aXNlIGxvb2tzIGNvb2wgYW5kIEknbSBjdXJyZW50bHkgdHJ5aW5nIGl0IHdpdGggbXkg Um9ja2NoaXAgY29kZS4KPiAKPiBSaWdodCBhZ2Fpbi4gIE15IHRlc3QgcGxhdGZvcm0gc2VlbXMg dG8gbm90IHNoaWZ0IHRoZSBtYXNrIGF0IGFsbCBzbwo+IHRoaXMgZGlkIG5vdCBjYXVzZSBhIHZp c2libGUgYnVnIGZvciBtZS4KCkknbSBjdXJyZW50bHkgY29udmVydGluZyBteSByb2NrY2hpcCBz dHVmZiB0byBpdCwgYXMgaXQgd291bGQgc29sdmUgYSBsb3Qgb2YgCnByb2JsZW1zIHdpdGggdGhl IG51bWVyb3VzIGNsb2NrIHR5cGVzIEknbSBkZWZpbmluZyBqdXN0IHRvIHB1dCB0aGUgc2hpZnQg YW5kIAptYXNrIHZhbHVlcyBzb21ld2hlcmUuCgpTbyBsZXRzIHNlZSBpZiBhbnl0aGluZyBtb3Jl IHR1cm5zIHVwIDstKQpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fXwpkZXZpY2V0cmVlLWRpc2N1c3MgbWFpbGluZyBsaXN0CmRldmljZXRyZWUtZGlzY3Vzc0Bs aXN0cy5vemxhYnMub3JnCmh0dHBzOi8vbGlzdHMub3psYWJzLm9yZy9saXN0aW5mby9kZXZpY2V0 cmVlLWRpc2N1c3MK From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756780Ab3FCUP4 (ORCPT ); Mon, 3 Jun 2013 16:15:56 -0400 Received: from gloria.sntech.de ([95.129.55.99]:51644 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753676Ab3FCUPx (ORCPT ); Mon, 3 Jun 2013 16:15:53 -0400 From: Heiko =?utf-8?q?St=C3=BCbner?= To: linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH RFC 2/3] clk: dt: binding for basic multiplexor clock Date: Mon, 3 Jun 2013 22:15:45 +0200 User-Agent: KMail/1.13.7 (Linux/3.2.0-3-686-pae; KDE/4.8.4; i686; ; ) Cc: Mike Turquette , devicetree-discuss@lists.ozlabs.org, linux-kernel@vger.kernel.org References: <1370281990-15090-1-git-send-email-mturquette@linaro.org> <201306032133.20039.heiko@sntech.de> <20130603200722.6077.85426@quantum> In-Reply-To: <20130603200722.6077.85426@quantum> MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <201306032215.45983.heiko@sntech.de> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Montag, 3. Juni 2013, 22:07:22 schrieb Mike Turquette: > Quoting Heiko Stübner (2013-06-03 12:33:19) > > > Hi Mike, > > > > I think it's a multiplexEr clock in the patch title, and see below > > Doh, you are right. But "xor" is so much cooler looking than "xer"... > > > Am Montag, 3. Juni 2013, 19:53:09 schrieb Mike Turquette: > > > Device Tree binding for the basic clock multiplexor, plus the setup > > > function to register the clock. Based on the existing fixed-clock > > > binding. > > > > > > Also relocate declaration of of_fixed_factor_clk_setup to keep things > > > tidy. > > > > > > Signed-off-by: Mike Turquette > > > > [...] > > > > > + > > > + reg = of_iomap(node, 0); > > > + pr_err("%s: reg is 0x%p\n", __func__, reg); > > > + > > > + if (of_property_read_u32(node, "mask", &mask)) { > > > + pr_err("%s: missing mask property for %s\n", __func__, > > > node->name); + return; > > > + } > > > + > > > + if (of_property_read_u32(node, "shift", &shift)) > > > + pr_debug("%s: missing shift property defaults to zero for > > > %s\n", + __func__, node->name); > > > + > > > + if (of_property_read_bool(node, "index_one")) > > > + clk_mux_flags |= CLK_MUX_INDEX_ONE; > > > + > > > + clk = clk_register_mux_table(NULL, clk_name, parent_names, > > > num_parents, + 0, reg, 0, mask, clk_mux_flags, > > > > > ^- should probably be shift > > > > Otherwise looks cool and I'm currently trying it with my Rockchip code. > > Right again. My test platform seems to not shift the mask at all so > this did not cause a visible bug for me. I'm currently converting my rockchip stuff to it, as it would solve a lot of problems with the numerous clock types I'm defining just to put the shift and mask values somewhere. So lets see if anything more turns up ;-)