Re: [PATCH 9/9] drm/i915: Assert dpll running in intel_crtc_load_lut() on pre-PCH platforms

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Wed, Jun 05, 2013 at 04:41:54PM -0300, Rodrigo Vivi wrote:
> why is this needed?

The spec says that on some hardware you need to PLL running before you
can poke at the palette registers. I didn't actually try to anger the
hardware so I'm not really sure what would happen otherwise, but IIRC
Jesse said something about a hard system hang...

> anyways: Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
> 
> On Tue, Jun 4, 2013 at 7:49 AM,  <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 3 +++
> >  1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 90d02c7..3be69bc 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -6340,6 +6340,9 @@ void intel_crtc_load_lut(struct drm_crtc *crtc)
> >         if (!crtc->enabled || !intel_crtc->active)
> >                 return;
> >
> > +       if (!HAS_PCH_SPLIT(dev_priv->dev))
> > +               assert_pll_enabled(dev_priv, pipe);
> > +
> >         /* use legacy palette for Ironlake */
> >         if (HAS_PCH_SPLIT(dev))
> >                 palreg = LGC_PALETTE(pipe);
> > --
> > 1.8.1.5
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 
> -- 
> Rodrigo Vivi
> Blog: http://blog.vivi.eng.br

-- 
Ville Syrjälä
Intel OTC