diff for duplicates of <201306062108.38587.heiko@sntech.de> diff --git a/a/1.txt b/N1/1.txt index 085825a..0bfbfa3 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -172,7 +172,7 @@ index 265f384..420a187 100644 struct clk *clk_register_divider(struct device *dev, const char *name, @@ -299,6 +311,9 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name, * Flags: - * CLK_MUX_INDEX_ONE - register index starts at 1, not 0 + * CLK_MUX_INDEX_ONE - register index starts@1, not 0 * CLK_MUX_INDEX_BIT - register index is a single bit (power of two) + * CLK_MUX_MASK_UPPER_HALF - this clock only uses the lower 16 bit of the + * register to hold the mux bits, while using the upper 16 bit to diff --git a/a/content_digest b/N1/content_digest index f030c80..e560dbd 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,22 +1,8 @@ "ref\0201306062107.58875.heiko@sntech.de\0" - "From\0Heiko St\303\274bner <heiko@sntech.de>\0" + "From\0heiko@sntech.de (Heiko St\303\274bner)\0" "Subject\0[PATCH v2 1/8] clk: flag to use upper half of the register as change indicator\0" "Date\0Thu, 6 Jun 2013 21:08:38 +0200\0" - "To\0linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0" - "Cc\0linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>" - Mike Turquette <mturquette@linaro.org> - Seungwon Jeon <tgih.jun@samsung.com> - Jaehoon Chung <jh80.chung@samsung.com> - Chris Ball <cjb@laptop.org> - linux-mmc@vger.kernel.org - Grant Likely <grant.likely@linaro.org> - Rob Herring <rob.herring@calxeda.com> - Linus Walleij <linus.walleij@linaro.org> - devicetree-discuss@lists.ozlabs.org - Russell King <linux@arm.linux.org.uk> - Arnd Bergmann <arnd@arndb.de> - Olof Johansson <olof@lixom.net> - " Thomas Petazzoni <thomas.petazzoni@free-electrons.com>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "There exist platforms, namely at least all Rockchip Cortex-A9 based ones,\n" @@ -193,7 +179,7 @@ " struct clk *clk_register_divider(struct device *dev, const char *name,\n" "@@ -299,6 +311,9 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name,\n" " * Flags:\n" - " * CLK_MUX_INDEX_ONE - register index starts at 1, not 0\n" + " * CLK_MUX_INDEX_ONE - register index starts@1, not 0\n" " * CLK_MUX_INDEX_BIT - register index is a single bit (power of two)\n" "+ * CLK_MUX_MASK_UPPER_HALF - this clock only uses the lower 16 bit of the\n" "+ *\tregister to hold the mux bits, while using the upper 16 bit to\n" @@ -212,4 +198,4 @@ "-- \n" 1.7.2.3 -24b8904d7f660fbc4e7ebb5b0e1310c314581741b2212883532a7a225c94b8ad +895876b1f6bae047933f73601d36b593fb1b362638f36933dbf7c6a35e212ff9
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