diff for duplicates of <201306062113.14024.heiko@sntech.de> diff --git a/a/1.txt b/N1/1.txt index 673a2d2..3489d11 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -5,7 +5,7 @@ Apart from the generic parts (gic, clocks, pinctrl) the only components currently supported are the timers, uarts and mmc ports (all DesignWare- based). -Signed-off-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> +Signed-off-by: Heiko Stuebner <heiko@sntech.de> --- arch/arm/Kconfig | 2 + arch/arm/Makefile | 1 + @@ -52,7 +52,7 @@ index 0000000..7f4709d @@ -0,0 +1,359 @@ +/* + * Copyright (c) 2013 MundoReader S.L. -+ * Author: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> ++ * Author: Heiko Stuebner <heiko@sntech.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by @@ -80,13 +80,13 @@ index 0000000..7f4709d + #address-cells = <1>; + #size-cells = <0>; + -+ cpu@0 { ++ cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; + reg = <0x0>; + }; -+ cpu@1 { ++ cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; @@ -100,7 +100,7 @@ index 0000000..7f4709d + compatible = "simple-bus"; + ranges; + -+ gic: interrupt-controller@1013d000 { ++ gic: interrupt-controller at 1013d000 { + compatible = "arm,cortex-a9-gic"; + interrupt-controller; + #interrupt-cells = <3>; @@ -108,20 +108,20 @@ index 0000000..7f4709d + <0x1013c100 0x0100>; + }; + -+ L2: l2-cache-controller@10138000 { ++ L2: l2-cache-controller at 10138000 { + compatible = "arm,pl310-cache"; + reg = <0x10138000 0x1000>; + cache-unified; + cache-level = <2>; + }; + -+ local-timer@1013c600 { ++ local-timer at 1013c600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x1013c600 0x20>; + interrupts = <GIC_PPI 13 0x304>; + }; + -+ timer@20038000 { ++ timer at 20038000 { + compatible = "snps,dw-apb-timer-osc"; + reg = <0x20038000 0x100>; + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; @@ -129,7 +129,7 @@ index 0000000..7f4709d + clock-names = "timer", "pclk"; + }; + -+ timer@2003a000 { ++ timer at 2003a000 { + compatible = "snps,dw-apb-timer-osc"; + reg = <0x2003a000 0x100>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; @@ -137,7 +137,7 @@ index 0000000..7f4709d + clock-names = "timer", "pclk"; + }; + -+ timer@2000e000 { ++ timer at 2000e000 { + compatible = "snps,dw-apb-timer-osc"; + reg = <0x2000e000 0x100>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; @@ -145,14 +145,14 @@ index 0000000..7f4709d + clock-names = "timer", "pclk"; + }; + -+ pinctrl@20008000 { ++ pinctrl at 20008000 { + compatible = "rockchip,rk3066a-pinctrl"; + reg = <0x20008000 0x150>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + -+ gpio0: gpio0@20034000 { ++ gpio0: gpio0 at 20034000 { + compatible = "rockchip,gpio-bank"; + reg = <0x20034000 0x100>; + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; @@ -165,7 +165,7 @@ index 0000000..7f4709d + #interrupt-cells = <2>; + }; + -+ gpio1: gpio1@2003c000 { ++ gpio1: gpio1 at 2003c000 { + compatible = "rockchip,gpio-bank"; + reg = <0x2003c000 0x100>; + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; @@ -178,7 +178,7 @@ index 0000000..7f4709d + #interrupt-cells = <2>; + }; + -+ gpio2: gpio2@2003e000 { ++ gpio2: gpio2 at 2003e000 { + compatible = "rockchip,gpio-bank"; + reg = <0x2003e000 0x100>; + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; @@ -191,7 +191,7 @@ index 0000000..7f4709d + #interrupt-cells = <2>; + }; + -+ gpio3: gpio3@20080000 { ++ gpio3: gpio3 at 20080000 { + compatible = "rockchip,gpio-bank"; + reg = <0x20080000 0x100>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; @@ -204,7 +204,7 @@ index 0000000..7f4709d + #interrupt-cells = <2>; + }; + -+ gpio4: gpio4@20084000 { ++ gpio4: gpio4 at 20084000 { + compatible = "rockchip,gpio-bank"; + reg = <0x20084000 0x100>; + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; @@ -217,7 +217,7 @@ index 0000000..7f4709d + #interrupt-cells = <2>; + }; + -+ gpio6: gpio6@2000a000 { ++ gpio6: gpio6 at 2000a000 { + compatible = "rockchip,gpio-bank"; + reg = <0x2000a000 0x100>; + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; @@ -342,7 +342,7 @@ index 0000000..7f4709d + }; + }; + -+ uart0: serial@10124000 { ++ uart0: serial at 10124000 { + compatible = "snps,dw-apb-uart"; + reg = <0x10124000 0x400>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; @@ -352,7 +352,7 @@ index 0000000..7f4709d + status = "disabled"; + }; + -+ uart1: serial@10126000 { ++ uart1: serial at 10126000 { + compatible = "snps,dw-apb-uart"; + reg = <0x10126000 0x400>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; @@ -362,7 +362,7 @@ index 0000000..7f4709d + status = "disabled"; + }; + -+ uart2: serial@20064000 { ++ uart2: serial at 20064000 { + compatible = "snps,dw-apb-uart"; + reg = <0x20064000 0x400>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; @@ -372,7 +372,7 @@ index 0000000..7f4709d + status = "disabled"; + }; + -+ uart3: serial@20068000 { ++ uart3: serial at 20068000 { + compatible = "snps,dw-apb-uart"; + reg = <0x20068000 0x400>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; @@ -382,7 +382,7 @@ index 0000000..7f4709d + status = "disabled"; + }; + -+ dwmmc@10214000 { ++ dwmmc at 10214000 { + compatible = "rockchip,cortex-a9-dw-mshc"; + reg = <0x10214000 0x1000>; + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; @@ -395,7 +395,7 @@ index 0000000..7f4709d + status = "disabled"; + }; + -+ dwmmc@10218000 { ++ dwmmc at 10218000 { + compatible = "rockchip,cortex-a9-dw-mshc"; + reg = <0x10218000 0x1000>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; @@ -448,7 +448,7 @@ index 0000000..0933e17 + * Device Tree support for Rockchip SoCs + * + * Copyright (c) 2013 MundoReader S.L. -+ * Author: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> ++ * Author: Heiko Stuebner <heiko@sntech.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by diff --git a/a/content_digest b/N1/content_digest index f4891dc..8650cfd 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,19 +1,8 @@ "ref\0201306062107.58875.heiko@sntech.de\0" - "ref\0201306062107.58875.heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org\0" - "From\0Heiko St\303\274bner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\0" + "From\0heiko@sntech.de (Heiko St\303\274bner)\0" "Subject\0[PATCH v2 8/8] arm: add basic support for Rockchip RK3066a boards\0" "Date\0Thu, 6 Jun 2013 21:13:13 +0200\0" - "To\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>\0" - "Cc\0Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>" - Seungwon Jeon <tgih.jun-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> - linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org> - Jaehoon Chung <jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> - Grant Likely <grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> - Chris Ball <cjb-2X9k7bc8m7Mdnm+yROfE0A@public.gmane.org> - " devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "This adds a generic devicetree board file and a dtsi for boards\n" @@ -23,7 +12,7 @@ "currently supported are the timers, uarts and mmc ports (all DesignWare-\n" "based).\n" "\n" - "Signed-off-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\n" + "Signed-off-by: Heiko Stuebner <heiko@sntech.de>\n" "---\n" " arch/arm/Kconfig | 2 +\n" " arch/arm/Makefile | 1 +\n" @@ -70,7 +59,7 @@ "@@ -0,0 +1,359 @@\n" "+/*\n" "+ * Copyright (c) 2013 MundoReader S.L.\n" - "+ * Author: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\n" + "+ * Author: Heiko Stuebner <heiko@sntech.de>\n" "+ *\n" "+ * This program is free software; you can redistribute it and/or modify\n" "+ * it under the terms of the GNU General Public License as published by\n" @@ -98,13 +87,13 @@ "+\t\t#address-cells = <1>;\n" "+\t\t#size-cells = <0>;\n" "+\n" - "+\t\tcpu@0 {\n" + "+\t\tcpu at 0 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\tcompatible = \"arm,cortex-a9\";\n" "+\t\t\tnext-level-cache = <&L2>;\n" "+\t\t\treg = <0x0>;\n" "+\t\t};\n" - "+\t\tcpu@1 {\n" + "+\t\tcpu at 1 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\tcompatible = \"arm,cortex-a9\";\n" "+\t\t\tnext-level-cache = <&L2>;\n" @@ -118,7 +107,7 @@ "+\t\tcompatible = \"simple-bus\";\n" "+\t\tranges;\n" "+\n" - "+\t\tgic: interrupt-controller@1013d000 {\n" + "+\t\tgic: interrupt-controller at 1013d000 {\n" "+\t\t\tcompatible = \"arm,cortex-a9-gic\";\n" "+\t\t\tinterrupt-controller;\n" "+\t\t\t#interrupt-cells = <3>;\n" @@ -126,20 +115,20 @@ "+\t\t\t <0x1013c100 0x0100>;\n" "+\t\t};\n" "+\n" - "+\t\tL2: l2-cache-controller@10138000 {\n" + "+\t\tL2: l2-cache-controller at 10138000 {\n" "+\t\t\tcompatible = \"arm,pl310-cache\";\n" "+\t\t\treg = <0x10138000 0x1000>;\n" "+\t\t\tcache-unified;\n" "+\t\t\tcache-level = <2>;\n" "+\t\t};\n" "+\n" - "+\t\tlocal-timer@1013c600 {\n" + "+\t\tlocal-timer at 1013c600 {\n" "+\t\t\tcompatible = \"arm,cortex-a9-twd-timer\";\n" "+\t\t\treg = <0x1013c600 0x20>;\n" "+\t\t\tinterrupts = <GIC_PPI 13 0x304>;\n" "+\t\t};\n" "+\n" - "+\t\ttimer@20038000 {\n" + "+\t\ttimer at 20038000 {\n" "+\t\t\tcompatible = \"snps,dw-apb-timer-osc\";\n" "+\t\t\treg = <0x20038000 0x100>;\n" "+\t\t\tinterrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -147,7 +136,7 @@ "+\t\t\tclock-names = \"timer\", \"pclk\";\n" "+\t\t};\n" "+\n" - "+\t\ttimer@2003a000 {\n" + "+\t\ttimer at 2003a000 {\n" "+\t\t\tcompatible = \"snps,dw-apb-timer-osc\";\n" "+\t\t\treg = <0x2003a000 0x100>;\n" "+\t\t\tinterrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -155,7 +144,7 @@ "+\t\t\tclock-names = \"timer\", \"pclk\";\n" "+\t\t};\n" "+\n" - "+\t\ttimer@2000e000 {\n" + "+\t\ttimer at 2000e000 {\n" "+\t\t\tcompatible = \"snps,dw-apb-timer-osc\";\n" "+\t\t\treg = <0x2000e000 0x100>;\n" "+\t\t\tinterrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -163,14 +152,14 @@ "+\t\t\tclock-names = \"timer\", \"pclk\";\n" "+\t\t};\n" "+\n" - "+\t\tpinctrl@20008000 {\n" + "+\t\tpinctrl at 20008000 {\n" "+\t\t\tcompatible = \"rockchip,rk3066a-pinctrl\";\n" "+\t\t\treg = <0x20008000 0x150>;\n" "+\t\t\t#address-cells = <1>;\n" "+\t\t\t#size-cells = <1>;\n" "+\t\t\tranges;\n" "+\n" - "+\t\t\tgpio0: gpio0@20034000 {\n" + "+\t\t\tgpio0: gpio0 at 20034000 {\n" "+\t\t\t\tcompatible = \"rockchip,gpio-bank\";\n" "+\t\t\t\treg = <0x20034000 0x100>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -183,7 +172,7 @@ "+\t\t\t\t#interrupt-cells = <2>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tgpio1: gpio1@2003c000 {\n" + "+\t\t\tgpio1: gpio1 at 2003c000 {\n" "+\t\t\t\tcompatible = \"rockchip,gpio-bank\";\n" "+\t\t\t\treg = <0x2003c000 0x100>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -196,7 +185,7 @@ "+\t\t\t\t#interrupt-cells = <2>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tgpio2: gpio2@2003e000 {\n" + "+\t\t\tgpio2: gpio2 at 2003e000 {\n" "+\t\t\t\tcompatible = \"rockchip,gpio-bank\";\n" "+\t\t\t\treg = <0x2003e000 0x100>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -209,7 +198,7 @@ "+\t\t\t\t#interrupt-cells = <2>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tgpio3: gpio3@20080000 {\n" + "+\t\t\tgpio3: gpio3 at 20080000 {\n" "+\t\t\t\tcompatible = \"rockchip,gpio-bank\";\n" "+\t\t\t\treg = <0x20080000 0x100>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -222,7 +211,7 @@ "+\t\t\t\t#interrupt-cells = <2>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tgpio4: gpio4@20084000 {\n" + "+\t\t\tgpio4: gpio4 at 20084000 {\n" "+\t\t\t\tcompatible = \"rockchip,gpio-bank\";\n" "+\t\t\t\treg = <0x20084000 0x100>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -235,7 +224,7 @@ "+\t\t\t\t#interrupt-cells = <2>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tgpio6: gpio6@2000a000 {\n" + "+\t\t\tgpio6: gpio6 at 2000a000 {\n" "+\t\t\t\tcompatible = \"rockchip,gpio-bank\";\n" "+\t\t\t\treg = <0x2000a000 0x100>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -360,7 +349,7 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tuart0: serial@10124000 {\n" + "+\t\tuart0: serial at 10124000 {\n" "+\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "+\t\t\treg = <0x10124000 0x400>;\n" "+\t\t\tinterrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -370,7 +359,7 @@ "+\t\t\tstatus = \"disabled\";\n" "+\t\t};\n" "+\n" - "+\t\tuart1: serial@10126000 {\n" + "+\t\tuart1: serial at 10126000 {\n" "+\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "+\t\t\treg = <0x10126000 0x400>;\n" "+\t\t\tinterrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -380,7 +369,7 @@ "+\t\t\tstatus = \"disabled\";\n" "+\t\t};\n" "+\n" - "+\t\tuart2: serial@20064000 {\n" + "+\t\tuart2: serial at 20064000 {\n" "+\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "+\t\t\treg = <0x20064000 0x400>;\n" "+\t\t\tinterrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -390,7 +379,7 @@ "+\t\t\tstatus = \"disabled\";\n" "+\t\t};\n" "+\n" - "+\t\tuart3: serial@20068000 {\n" + "+\t\tuart3: serial at 20068000 {\n" "+\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "+\t\t\treg = <0x20068000 0x400>;\n" "+\t\t\tinterrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -400,7 +389,7 @@ "+\t\t\tstatus = \"disabled\";\n" "+\t\t};\n" "+\n" - "+\t\tdwmmc@10214000 {\n" + "+\t\tdwmmc at 10214000 {\n" "+\t\t\tcompatible = \"rockchip,cortex-a9-dw-mshc\";\n" "+\t\t\treg = <0x10214000 0x1000>;\n" "+\t\t\tinterrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -413,7 +402,7 @@ "+\t\t\tstatus = \"disabled\";\n" "+\t\t};\n" "+\n" - "+\t\tdwmmc@10218000 {\n" + "+\t\tdwmmc at 10218000 {\n" "+\t\t\tcompatible = \"rockchip,cortex-a9-dw-mshc\";\n" "+\t\t\treg = <0x10218000 0x1000>;\n" "+\t\t\tinterrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -466,7 +455,7 @@ "+ * Device Tree support for Rockchip SoCs\n" "+ *\n" "+ * Copyright (c) 2013 MundoReader S.L.\n" - "+ * Author: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\n" + "+ * Author: Heiko Stuebner <heiko@sntech.de>\n" "+ *\n" "+ * This program is free software; you can redistribute it and/or modify\n" "+ * it under the terms of the GNU General Public License as published by\n" @@ -519,4 +508,4 @@ "-- \n" 1.7.2.3 -0c198efc5439682aee21df76f2f27b7889ba222c0c0e11a358cabcfa0516c170 +5ed4c1538814b1d076b424a18c17827357362e712bd2253a85cad0b1d60b99d8
diff --git a/a/1.txt b/N2/1.txt index 673a2d2..c359e8a 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -5,7 +5,7 @@ Apart from the generic parts (gic, clocks, pinctrl) the only components currently supported are the timers, uarts and mmc ports (all DesignWare- based). -Signed-off-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> +Signed-off-by: Heiko Stuebner <heiko@sntech.de> --- arch/arm/Kconfig | 2 + arch/arm/Makefile | 1 + @@ -52,7 +52,7 @@ index 0000000..7f4709d @@ -0,0 +1,359 @@ +/* + * Copyright (c) 2013 MundoReader S.L. -+ * Author: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> ++ * Author: Heiko Stuebner <heiko@sntech.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by @@ -448,7 +448,7 @@ index 0000000..0933e17 + * Device Tree support for Rockchip SoCs + * + * Copyright (c) 2013 MundoReader S.L. -+ * Author: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> ++ * Author: Heiko Stuebner <heiko@sntech.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by diff --git a/a/content_digest b/N2/content_digest index f4891dc..ef16c0c 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,19 +1,22 @@ "ref\0201306062107.58875.heiko@sntech.de\0" - "ref\0201306062107.58875.heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org\0" - "From\0Heiko St\303\274bner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\0" + "From\0Heiko St\303\274bner <heiko@sntech.de>\0" "Subject\0[PATCH v2 8/8] arm: add basic support for Rockchip RK3066a boards\0" "Date\0Thu, 6 Jun 2013 21:13:13 +0200\0" - "To\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>\0" - "Cc\0Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>" - Seungwon Jeon <tgih.jun-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> - linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org> - Jaehoon Chung <jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> - Grant Likely <grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> - Chris Ball <cjb-2X9k7bc8m7Mdnm+yROfE0A@public.gmane.org> - " devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org\0" + "To\0linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0" + "Cc\0linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>" + Mike Turquette <mturquette@linaro.org> + Seungwon Jeon <tgih.jun@samsung.com> + Jaehoon Chung <jh80.chung@samsung.com> + Chris Ball <cjb@laptop.org> + linux-mmc@vger.kernel.org + Grant Likely <grant.likely@linaro.org> + Rob Herring <rob.herring@calxeda.com> + Linus Walleij <linus.walleij@linaro.org> + devicetree-discuss@lists.ozlabs.org + Russell King <linux@arm.linux.org.uk> + Arnd Bergmann <arnd@arndb.de> + Olof Johansson <olof@lixom.net> + " Thomas Petazzoni <thomas.petazzoni@free-electrons.com>\0" "\00:1\0" "b\0" "This adds a generic devicetree board file and a dtsi for boards\n" @@ -23,7 +26,7 @@ "currently supported are the timers, uarts and mmc ports (all DesignWare-\n" "based).\n" "\n" - "Signed-off-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\n" + "Signed-off-by: Heiko Stuebner <heiko@sntech.de>\n" "---\n" " arch/arm/Kconfig | 2 +\n" " arch/arm/Makefile | 1 +\n" @@ -70,7 +73,7 @@ "@@ -0,0 +1,359 @@\n" "+/*\n" "+ * Copyright (c) 2013 MundoReader S.L.\n" - "+ * Author: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\n" + "+ * Author: Heiko Stuebner <heiko@sntech.de>\n" "+ *\n" "+ * This program is free software; you can redistribute it and/or modify\n" "+ * it under the terms of the GNU General Public License as published by\n" @@ -466,7 +469,7 @@ "+ * Device Tree support for Rockchip SoCs\n" "+ *\n" "+ * Copyright (c) 2013 MundoReader S.L.\n" - "+ * Author: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\n" + "+ * Author: Heiko Stuebner <heiko@sntech.de>\n" "+ *\n" "+ * This program is free software; you can redistribute it and/or modify\n" "+ * it under the terms of the GNU General Public License as published by\n" @@ -519,4 +522,4 @@ "-- \n" 1.7.2.3 -0c198efc5439682aee21df76f2f27b7889ba222c0c0e11a358cabcfa0516c170 +b758c259c1412e9a063afdc724dc950273e424d9fc7716487049b1b423dea388
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.