From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gleb Natapov Subject: Re: [PATCH 1/2] kvm-unit-tests: Add a func to run instruction in emulator Date: Sun, 9 Jun 2013 15:49:53 +0300 Message-ID: <20130609124953.GU4725@redhat.com> References: <1370572299-2706-1-git-send-email-yzt356@gmail.com> <20130609110738.GO4725@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: kvm , Paolo Bonzini To: =?utf-8?B?5p2O5pil5aWHIDxBcnRodXIgQ2h1bnFpIExpPg==?= Return-path: Received: from mx1.redhat.com ([209.132.183.28]:5540 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752509Ab3FIMt4 convert rfc822-to-8bit (ORCPT ); Sun, 9 Jun 2013 08:49:56 -0400 Content-Disposition: inline In-Reply-To: Sender: kvm-owner@vger.kernel.org List-ID: On Sun, Jun 09, 2013 at 08:44:32PM +0800, =E6=9D=8E=E6=98=A5=E5=A5=87 <= Arthur Chunqi Li> wrote: > On Sun, Jun 9, 2013 at 7:07 PM, Gleb Natapov wrote: > > On Fri, Jun 07, 2013 at 10:31:38AM +0800, Arthur Chunqi Li wrote: > >> Add a function trap_emulator to run an instruction in emulator. > >> Set inregs first (%rax, %rsp, %rbp, %rflags have special usage and > >> cannot set in inregs), put instruction codec in alt_insn and call > >> func with alt_insn_length. Get results in outregs. > >> > > Why %rax, %rsp, %rbp, %rflags cannot be set in inregs? > > > > %rax because trapping instruction uses it? Use one that does not us= e > > register at all: MOV r/m32, imm32 > I don't know why set %rax before call alt_insn_page can cause error. = I > use "xchg %%rax, 0+%[save]" before "call *%1" and the %rcx is not set > correctly. We better find this out :) > > > > %rsp and %rbp because of ret on instruction page? Use the same tric= k > > realmode.c test uses: have the code that sets/saves registers in > > insn_page/alt_insn_page itself and copy the instruction you want to= test > > into the page itself instead of doing call. > I don't know how instructions between calling insn_page and > alt_insn_page are executed (function install_page and some other > instructions before call *%1". If these insns are executed after > insn_page is called, changes before the trapping instruction may > affect the executing of these instructions. >=20 Not sure what do you mean here. > > > > Not sure what is so special about %rflags. > > > >> Signed-off-by: Arthur Chunqi Li > >> --- > >> x86/emulator.c | 67 +++++++++++++++++++++++++++++++++++++++++++= +++++++++++++ > >> 1 file changed, 67 insertions(+) > >> mode change 100644 =3D> 100755 x86/emulator.c > >> > >> diff --git a/x86/emulator.c b/x86/emulator.c > >> old mode 100644 > >> new mode 100755 > >> index 96576e5..770e8f7 > >> --- a/x86/emulator.c > >> +++ b/x86/emulator.c > >> @@ -11,6 +11,13 @@ int fails, tests; > >> > >> static int exceptions; > >> > >> +struct regs { > >> + u64 rax, rbx, rcx, rdx; > >> + u64 rsi, rdi, rsp, rbp; > >> + u64 rip, rflags; > >> +}; > >> +static struct regs inregs, outregs; > >> + > >> void report(const char *name, int result) > >> { > >> ++tests; > >> @@ -685,6 +692,66 @@ static void test_shld_shrd(u32 *mem) > >> report("shrd (cl)", *mem =3D=3D ((0x12345678 >> 3) | (5u << 2= 9))); > >> } > >> > >> +static void trap_emulator(uint64_t *mem, uint8_t *insn_page, > >> + uint8_t *alt_insn_page, void *insn_ram, > >> + uint8_t *alt_insn, int alt_insn_length) > >> +{ > >> + ulong *cr3 =3D (ulong *)read_cr3(); > >> + int i; > >> + static struct regs save; > >> + > >> + // Pad with RET instructions > >> + memset(insn_page, 0xc3, 4096); > >> + memset(alt_insn_page, 0xc3, 4096); > >> + > >> + // Place a trapping instruction in the page to trigger a VME= XIT > >> + insn_page[0] =3D 0x89; // mov %eax, (%rax) > >> + insn_page[1] =3D 0x00; > >> + insn_page[2] =3D 0x90; // nop > >> + insn_page[3] =3D 0xc3; // ret > >> + > >> + // Place the instruction we want the hypervisor to see in th= e alternate page > >> + for (i=3D0; i >> + alt_insn_page[i] =3D alt_insn[i]; > >> + save =3D inregs; > >> + > >> + // Load the code TLB with insn_page, but point the page tabl= es at > >> + // alt_insn_page (and keep the data TLB clear, for AMD decod= e assist). > >> + // This will make the CPU trap on the insn_page instruction = but the > >> + // hypervisor will see alt_insn_page. > >> + install_page(cr3, virt_to_phys(insn_page), insn_ram); > >> + invlpg(insn_ram); > >> + // Load code TLB > >> + asm volatile("call *%0" : : "r"(insn_ram + 3)); > >> + install_page(cr3, virt_to_phys(alt_insn_page), insn_ram); > >> + // Trap, let hypervisor emulate at alt_insn_page > >> + asm volatile( > >> + "xchg %%rbx, 8+%[save] \n\t" > >> + "xchg %%rcx, 16+%[save] \n\t" > >> + "xchg %%rdx, 24+%[save] \n\t" > >> + "xchg %%rsi, 32+%[save] \n\t" > >> + "xchg %%rdi, 40+%[save] \n\t" > >> + > >> + "call *%1\n\t" > >> + > >> + "mov %%rax, 0+%[save] \n\t" > >> + "xchg %%rbx, 8+%[save] \n\t" > >> + "xchg %%rcx, 16+%[save] \n\t" > >> + "xchg %%rdx, 24+%[save] \n\t" > >> + "xchg %%rsi, 32+%[save] \n\t" > >> + "xchg %%rdi, 40+%[save] \n\t" > >> + "mov %%rsp, 48+%[save] \n\t" > >> + "mov %%rbp, 56+%[save] \n\t" > >> + /* Save RFLAGS in outregs*/ > >> + "pushf \n\t" > >> + "popq 72+%[save] \n\t" > >> + : [save]"+m"(save) > >> + : "r"(insn_ram), "a"(mem) > >> + : "memory", "cc" > >> + ); > >> + outregs =3D save; > >> +} > >> + > >> static void advance_rip_by_3_and_note_exception(struct ex_regs *r= egs) > >> { > >> ++exceptions; > >> -- > >> 1.7.9.5 > > > > -- > > Gleb. >=20 >=20 >=20 > -- > Arthur Chunqi Li > Department of Computer Science > School of EECS > Peking University > Beijing, China -- Gleb.