From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH] drm/i915: disable sdvo pixel multiplier cross-check for HAS_PCH_SPLIT Date: Wed, 12 Jun 2013 16:51:09 +0200 Message-ID: <20130612145109.GD22870@phenom.ffwll.local> References: <1370878000-18041-1-git-send-email-daniel.vetter@ffwll.ch> <1371030444-7205-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-ea0-f177.google.com (mail-ea0-f177.google.com [209.85.215.177]) by gabe.freedesktop.org (Postfix) with ESMTP id CA60FE5C26 for ; Wed, 12 Jun 2013 07:51:14 -0700 (PDT) Received: by mail-ea0-f177.google.com with SMTP id j14so7041505eak.22 for ; Wed, 12 Jun 2013 07:51:13 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1371030444-7205-1-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Intel Graphics Development Cc: Daniel Vetter List-Id: intel-gfx@lists.freedesktop.org On Wed, Jun 12, 2013 at 11:47:24AM +0200, Daniel Vetter wrote: > We don't (yet) have proper pixel multiplier readout support on pch > split platforms, so the cross check will naturally fail. > = > v2: Fix spelling in the comment, spotted by Ville. > = > v3: Since the ordering constraint is pretty tricky between the crtc > get_pipe_config callback and the encoder->get_config callback add a > few comments about it. Prompted by a discussion with Chris Wilson on > irc about why this does work anywhere else than on i915g/gm. > = > Reported-by: Chris Wilson > Cc: Chris Wilson > Cc: Ville Syrj=E4l=E4 > Signed-off-by: Daniel Vetter Merged with Chris' irc-ack to dinq. -Daniel > --- > drivers/gpu/drm/i915/intel_drv.h | 3 ++- > drivers/gpu/drm/i915/intel_sdvo.c | 11 +++++++++++ > 2 files changed, 13 insertions(+), 1 deletion(-) > = > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/inte= l_drv.h > index 3363358..cf26fa8 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -140,7 +140,8 @@ struct intel_encoder { > * it is connected to in the pipe parameter. */ > bool (*get_hw_state)(struct intel_encoder *, enum pipe *pipe); > /* Reconstructs the equivalent mode flags for the current hardware > - * state. */ > + * state. This must be called _after_ display->get_pipe_config has > + * pre-filled the pipe config. */ > void (*get_config)(struct intel_encoder *, > struct intel_crtc_config *pipe_config); > int crtc_mask; > diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/int= el_sdvo.c > index a6c53b6..1327fa9 100644 > --- a/drivers/gpu/drm/i915/intel_sdvo.c > +++ b/drivers/gpu/drm/i915/intel_sdvo.c > @@ -1342,6 +1342,13 @@ static void intel_sdvo_get_config(struct intel_enc= oder *encoder, > = > pipe_config->adjusted_mode.flags |=3D flags; > = > + /* > + * pixel multiplier readout is tricky: Only on i915g/gm it is stored in > + * the sdvo port register, on all other platforms it is part of the dpll > + * state. Since the general pipe state readout happens before the > + * encoder->get_config we so already have a valid pixel multplier on all > + * other platfroms. > + */ > if (IS_I915G(dev) || IS_I915GM(dev)) { > sdvox =3D I915_READ(intel_sdvo->sdvo_reg); > pipe_config->pixel_multiplier =3D > @@ -1362,6 +1369,10 @@ static void intel_sdvo_get_config(struct intel_enc= oder *encoder, > encoder_pixel_multiplier =3D 4; > break; > } > + > + if(HAS_PCH_SPLIT(dev)) > + return; /* no pixel multiplier readout support yet */ > + > WARN(encoder_pixel_multiplier !=3D pipe_config->pixel_multiplier, > "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n", > pipe_config->pixel_multiplier, encoder_pixel_multiplier); > -- = > 1.7.11.7 > = -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch