From: Matthew Garrett <mjg59@srcf.ucam.org>
To: Larry Baker <baker@usgs.gov>
Cc: linux-acpi@vger.kernel.org, Rob E Russell <robr@us.ibm.com>
Subject: Re: Wishlist: Disable C6 in intel_idle for Model 44 processors
Date: Wed, 12 Jun 2013 19:32:49 +0100 [thread overview]
Message-ID: <20130612183249.GA20957@srcf.ucam.org> (raw)
In-Reply-To: <1BD2BF18-8FAA-4633-8B6D-7CA2D6AE67AC@usgs.gov>
On Wed, Jun 12, 2013 at 11:11:21AM -0700, Larry Baker wrote:
> The processor errata is operating system agnostic. I suspect the BIOS
> workaround they envision would be a feature in the BIOS to limit the
> choice of C states to be used. The IBM BIOS has such a setting, and
> the default value is to completely disable C states. However,
> intel_idle ignores the BIOS setting.
No, the BIOS workaround will typically be to program the memory
controller such that the problem isn't triggered. If you're having
latency-related issues then the appropriate fix is to use the pm_qos
interface that's present in RHEL 6 and the upstream kernel, and you can
do so in RHEL using the ktune command.
--
Matthew Garrett | mjg59@srcf.ucam.org
next prev parent reply other threads:[~2013-06-12 18:32 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-11 21:30 Wishlist: Disable C6 in intel_idle for Model 44 processors Larry Baker
2013-06-11 21:34 ` Larry Baker
2013-06-12 13:40 ` Matthew Garrett
2013-06-12 18:11 ` Larry Baker
2013-06-12 18:32 ` Matthew Garrett [this message]
2013-06-14 19:32 ` Len Brown
2013-06-14 20:23 ` Larry Baker
[not found] ` <OF3D706B0A.D5540D6C-ON85257B8A.0076278F-85257B8A.0076E4B1@us.ibm.com>
2013-06-14 22:40 ` Larry Baker
2013-06-20 19:22 ` Larry Baker
2013-06-16 3:29 ` Henrique de Moraes Holschuh
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