From: Gavin Shan <shangw@linux.vnet.ibm.com>
To: Gavin Shan <shangw@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v5 00/31] EEH Support for PowerNV platform
Date: Tue, 18 Jun 2013 16:41:44 +0800 [thread overview]
Message-ID: <20130618084144.GA5317@shangw.(null)> (raw)
In-Reply-To: <1371544435-4943-1-git-send-email-shangw@linux.vnet.ibm.com>
On Tue, Jun 18, 2013 at 04:33:24PM +0800, Gavin Shan wrote:
Hi Ben,
I resend the whole series of patches because some newly added patches among
it.
>Initially, the series of patches is built based on 3.10.RC1 and the patchset
>doesn't intend to enable EEH functionality for PHB3 for now. Obviously, PHB3
>EEH support on PowerNV platform is something to do in future.
>
.../...
>Change log
>==========
>
>v4 -> v5:
> * Add patch [10/31] to make EEH core running with single kthread.
> * Add patch [11/31] to trace the time stamp of last error in the last
> hour for specific PE
> * Add patch [12/31] to purge duplicate EEH events
> * Add patch [14/31] for EEH core to handle special event, which doesn't
> have binding PE
> * Add patch [22/31] to support I/O chip next_error() backend. Almost all
> stuff from original pci_err.c moved to eeh-ioda.c. Appropriate cleanup
> is applied as well.
> * Changed [27/31] to allow clearing specific OPAL notifier event in the
> cache traced by variable "last_notified_mask"
> * Changed [29/31] to register OPAL event notifier on post-initilization
> period.
Please review those patches at your available time. The left patches shouldn't
be changed or with minor changes without affecting the whole logic. Thanks in
advance for your time :-)
The target of v5 is mainly for following aspects according to your comments:
- Make EEH core running with single-kthread.
- Add new eeh_ops::next_error() for PowerNV platform to use. Almost all stuff
of original pci-err.c moved to the backend.
- Hanle special event (without binding PE) in EEH core. The special events
are purely come from PowerNV platform (error interrupts).
Thanks,
Gavin
prev parent reply other threads:[~2013-06-18 8:42 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-18 8:33 [PATCH v5 00/31] EEH Support for PowerNV platform Gavin Shan
2013-06-18 8:33 ` [PATCH 01/31] powerpc/eeh: Move common part to kernel directory Gavin Shan
2013-06-19 3:58 ` Michael Neuling
2013-06-19 6:11 ` Gavin Shan
2013-06-19 6:18 ` Gavin Shan
2013-06-19 7:29 ` Gavin Shan
2013-06-18 8:33 ` [PATCH 02/31] powerpc/eeh: Cleanup for EEH core Gavin Shan
2013-06-19 6:37 ` Gavin Shan
2013-06-18 8:33 ` [PATCH 03/31] powerpc/eeh: Make eeh_phb_pe_get() public Gavin Shan
2013-06-18 8:33 ` [PATCH 04/31] powerpc/eeh: Make eeh_pe_get() public Gavin Shan
2013-06-18 8:33 ` [PATCH 05/31] powerpc/eeh: Trace PCI bus from PE Gavin Shan
2013-06-19 7:21 ` Mike Qiu
2013-06-19 8:48 ` Gavin Shan
2013-06-19 10:20 ` Gavin Shan
2013-06-18 8:33 ` [PATCH 06/31] powerpc/eeh: Make eeh_init() public Gavin Shan
2013-06-18 8:33 ` [PATCH 07/31] powerpc/eeh: EEH post initialization operation Gavin Shan
2013-06-18 8:33 ` [PATCH 08/31] powerpc/eeh: Refactor eeh_reset_pe_once() Gavin Shan
2013-06-18 8:33 ` [PATCH 09/31] powerpc/eeh: Delay EEH probe during hotplug Gavin Shan
2013-06-18 8:33 ` [PATCH 10/31] powerpc/eeh: Single kthread to handle events Gavin Shan
2013-06-18 8:33 ` [PATCH 11/31] powerpc/eeh: Trace time on first error for PE Gavin Shan
2013-06-18 8:33 ` [PATCH 12/31] powerpc/eeh: Allow to purge EEH events Gavin Shan
2013-06-18 8:33 ` [PATCH 13/31] powerpc/eeh: Export confirm_error_lock Gavin Shan
2013-06-18 8:33 ` [PATCH 14/31] powerpc/eeh: EEH core to handle special event Gavin Shan
2013-06-19 6:19 ` Gavin Shan
2013-06-18 8:33 ` [PATCH 15/31] powerpc/eeh: Sync OPAL API with firmware Gavin Shan
2013-06-18 8:33 ` [PATCH 16/31] powerpc/eeh: EEH backend for P7IOC Gavin Shan
2013-06-18 8:33 ` [PATCH 17/31] powerpc/eeh: I/O chip post initialization Gavin Shan
2013-06-18 8:33 ` [PATCH 18/31] powerpc/eeh: I/O chip EEH enable option Gavin Shan
2013-06-18 8:33 ` [PATCH 19/31] powerpc/eeh: I/O chip EEH state retrieval Gavin Shan
2013-06-18 8:33 ` [PATCH 20/31] powerpc/eeh: I/O chip PE reset Gavin Shan
2013-06-18 8:33 ` [PATCH 21/31] powerpc/eeh: I/O chip PE log and bridge setup Gavin Shan
2013-06-18 8:33 ` [PATCH 22/31] powerpc/eeh: I/O chip next error Gavin Shan
2013-06-18 8:33 ` [PATCH 23/31] powerpc/eeh: PowerNV EEH backends Gavin Shan
2013-06-18 8:33 ` [PATCH 24/31] powerpc/eeh: Initialization for PowerNV Gavin Shan
2013-06-18 8:33 ` [PATCH 25/31] powerpc/eeh: Enable EEH check for config access Gavin Shan
2013-06-18 8:33 ` [PATCH 26/31] powerpc/eeh: Allow to check fenced PHB proactively Gavin Shan
2013-06-18 8:33 ` [PATCH 27/31] powernv/opal: Notifier for OPAL events Gavin Shan
2013-06-18 8:33 ` [PATCH 28/31] powernv/opal: Disable OPAL notifier upon poweroff Gavin Shan
2013-06-18 8:33 ` [PATCH 29/31] powerpc/eeh: Register OPAL notifier for PCI error Gavin Shan
2013-06-18 8:33 ` [PATCH 30/31] powerpc/powernv: Debugfs directory for PHB Gavin Shan
2013-06-18 8:33 ` [PATCH 31/31] powerpc/eeh: Debugfs for error injection Gavin Shan
2013-06-18 8:41 ` Gavin Shan [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='20130618084144.GA5317@shangw.(null)' \
--to=shangw@linux.vnet.ibm.com \
--cc=linuxppc-dev@lists.ozlabs.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.