All of lore.kernel.org
 help / color / mirror / Atom feed
diff for duplicates of <201306181829.35514.arnd@arndb.de>

diff --git a/a/1.txt b/N1/1.txt
index d4f685b..055ba23 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -19,7 +19,7 @@ The MBUS_ID numbers above are made up since I don't know them, but this way you
 describe how the entire 4GB MMIO address space of the PCI bus is mapped into the
 MBUS address space.
 
-> +                       pcie at 1,0 {
+> +                       pcie@1,0 {
 > +                               device_type = "pci";
 > +                               assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
 > +                               reg = <0x0800 0 0 0 0>;
@@ -41,7 +41,7 @@ address word equal to the port number:
 > +                               marvell,pcie-lane = <0>;
 > +                               clocks = <&gateclk 5>;
 > +                               status = "disabled";
-> +                       pcie at 2,0 {
+> +                       pcie@2,0 {
 > +                               device_type = "pci";
 > +                               assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
 > +                               reg = <0x1000 0 0 0 0>;
diff --git a/a/content_digest b/N1/content_digest
index e49a141..3ea4bf6 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,9 +1,20 @@
  "ref\01371554737-25319-1-git-send-email-ezequiel.garcia@free-electrons.com\0"
  "ref\01371554737-25319-12-git-send-email-ezequiel.garcia@free-electrons.com\0"
- "From\0arnd@arndb.de (Arnd Bergmann)\0"
- "Subject\0[PATCH v3 11/12] ARM: mvebu: Relocate Armada 370 PCIe device tree nodes\0"
+ "From\0Arnd Bergmann <arnd@arndb.de>\0"
+ "Subject\0Re: [PATCH v3 11/12] ARM: mvebu: Relocate Armada 370 PCIe device tree nodes\0"
  "Date\0Tue, 18 Jun 2013 18:29:35 +0200\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Ezequiel Garcia <ezequiel.garcia@free-electrons.com>\0"
+ "Cc\0Thomas Petazzoni <thomas.petazzoni@free-electrons.com>"
+  Andrew Lunn <andrew@lunn.ch>
+  Jason Cooper <jason@lakedaemon.net>
+  devicetree-discuss@lists.ozlabs.org
+  Grant Likely <grant.likely@secretlab.ca>
+  Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
+  Maen Suleiman <maen@marvell.com>
+  Lior Amsalem <alior@marvell.com>
+  Gregory Clement <gregory.clement@free-electrons.com>
+  linux-arm-kernel@lists.infradead.org
+ " Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\0"
  "\00:1\0"
  "b\0"
  "On Tuesday 18 June 2013, Ezequiel Garcia wrote:\n"
@@ -27,7 +38,7 @@
  "describe how the entire 4GB MMIO address space of the PCI bus is mapped into the\n"
  "MBUS address space.\n"
  "\n"
- "> +                       pcie at 1,0 {\n"
+ "> +                       pcie@1,0 {\n"
  "> +                               device_type = \"pci\";\n"
  "> +                               assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;\n"
  "> +                               reg = <0x0800 0 0 0 0>;\n"
@@ -49,7 +60,7 @@
  "> +                               marvell,pcie-lane = <0>;\n"
  "> +                               clocks = <&gateclk 5>;\n"
  "> +                               status = \"disabled\";\n"
- "> +                       pcie at 2,0 {\n"
+ "> +                       pcie@2,0 {\n"
  "> +                               device_type = \"pci\";\n"
  "> +                               assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;\n"
  "> +                               reg = <0x1000 0 0 0 0>;\n"
@@ -73,4 +84,4 @@
  "\n"
  "\tArnd"
 
-df02a716111f49eba93c60dddb5300cb312e4975e253954ecb66e5f32ae7514c
+fcd5b5b1c46f4268537be68f661b4d82b3d193f5f1e26787d76ca9986fc96ed9

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.