From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 19 Jun 2013 12:53:16 +0200 (CEST) Received: from localhost.localdomain ([127.0.0.1]:50334 "EHLO linux-mips.org" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S6823118Ab3FSKxLicnGg (ORCPT ); Wed, 19 Jun 2013 12:53:11 +0200 Received: from scotty.linux-mips.net (localhost.localdomain [127.0.0.1]) by scotty.linux-mips.net (8.14.5/8.14.4) with ESMTP id r5JAr5Sn014130; Wed, 19 Jun 2013 12:53:05 +0200 Received: (from ralf@localhost) by scotty.linux-mips.net (8.14.5/8.14.5/Submit) id r5JAr0w1014129; Wed, 19 Jun 2013 12:53:00 +0200 Date: Wed, 19 Jun 2013 12:52:59 +0200 From: Ralf Baechle To: Arnd Bergmann Cc: David Daney , linux-mips@linux-mips.org, Jamie Iles , Greg Kroah-Hartman , Jiri Slaby , linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, David Daney Subject: Re: [PATCH 3/5] tty/8250_dw: Add support for OCTEON UARTS. Message-ID: <20130619105259.GC9448@linux-mips.org> References: <1371582775-12141-1-git-send-email-ddaney.cavm@gmail.com> <1371582775-12141-4-git-send-email-ddaney.cavm@gmail.com> <2302882.NVjP8DdXWY@wuerfel> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <2302882.NVjP8DdXWY@wuerfel> User-Agent: Mutt/1.5.21 (2010-09-15) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 37008 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips On Wed, Jun 19, 2013 at 12:01:06PM +0200, Arnd Bergmann wrote: > This breaks building on 32 bit architectures as I found on my daily ARM > builds: __raw_writeq cannot be defined on architectures that don't have > native 64 bit data access instructions. It's also wrong to use the > __raw_* variant, which is not guaranteed to be atomic and is not > endian-safe. I've dequeued the series from the mips-next tree until David has a chance to fix this. Ralf