From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Detect invalid scanout pitches
Date: Thu, 20 Jun 2013 13:34:12 +0300 [thread overview]
Message-ID: <20130620103412.GJ5004@intel.com> (raw)
In-Reply-To: <20130620091436.GC18932@cantiga.alporthouse.com>
On Thu, Jun 20, 2013 at 10:14:36AM +0100, Chris Wilson wrote:
> On Thu, Jun 20, 2013 at 11:17:16AM +0300, Ville Syrjälä wrote:
> > Assuming all the planes on a specific piece of hardware have the same
> > pitch limits, I'd like the checks to be live in
> > intel_framebuffer_init() so that the issue gets caught as early as
> > possible. For stricter per-plane limits we obviously need the checks
> > in update_plane.
> >
> > What I can gather from BSpec is this:
> > gen2: linear/tiled 8k, (maybe DSPC tiled max 4k?)
> > gen3: linear ?, tiled 8k
> > gen4: linear ?, tiled 16k
> > ctg: linear ?, tiled 16k
> > ilk+: 32k all the way
> >
> > Looking at your patch you have 16k,32k,32k for the ?s in my list.
> > Otherwise your numbers seem to agree with my findings.
>
> The only one I didn't check was the VLV addendum.
My VLV doc says 16K for tiled.
--
Ville Syrjälä
Intel OTC
next prev parent reply other threads:[~2013-06-20 10:34 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-19 15:20 [PATCH] drm/i915: Detect invalid scanout pitches Chris Wilson
2013-06-19 15:50 ` Chris Wilson
2013-06-20 8:17 ` Ville Syrjälä
2013-06-20 9:14 ` Chris Wilson
2013-06-20 10:29 ` Ville Syrjälä
2013-06-20 12:27 ` Chris Wilson
2013-06-20 12:44 ` Ville Syrjälä
2013-06-20 13:54 ` Chris Wilson
2013-06-20 10:34 ` Ville Syrjälä [this message]
-- strict thread matches above, loose matches on Subject: below --
2013-06-20 16:14 Chris Wilson
2013-06-24 15:05 ` Ville Syrjälä
2013-06-25 16:26 ` Chris Wilson
2013-06-25 16:29 ` Daniel Vetter
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