diff for duplicates of <201306210130.33033.heiko@sntech.de> diff --git a/a/1.txt b/N1/1.txt index c67297a..ac04cca 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -8,7 +8,7 @@ that the only bootloader currently in existence for Rockchip devices is the propietary Rockchip one that always setups the clocks in the necessary way. -Signed-off-by: Heiko Stuebner <heiko@sntech.de> +Signed-off-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> --- arch/arm/boot/dts/rk3066a-clocks.dtsi | 299 +++++++++++++++++++++++++++++++++ 1 file changed, 299 insertions(+) @@ -22,7 +22,7 @@ index 0000000..6e307fc @@ -0,0 +1,299 @@ +/* + * Copyright (c) 2013 MundoReader S.L. -+ * Author: Heiko Stuebner <heiko@sntech.de> ++ * Author: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by @@ -71,7 +71,7 @@ index 0000000..6e307fc + #clock-cells = <0>; + }; + -+ clk_gates0: gate-clk at 200000d0 { ++ clk_gates0: gate-clk@200000d0 { + compatible = "rockchip,rk2928-gate-clk"; + reg = <0x200000d0 0x4>; + clocks = <&dummy>, <&dummy>, @@ -96,7 +96,7 @@ index 0000000..6e307fc + #clock-cells = <1>; + }; + -+ clk_gates1: gate-clk at 200000d4 { ++ clk_gates1: gate-clk@200000d4 { + compatible = "rockchip,rk2928-gate-clk"; + reg = <0x200000d4 0x4>; + clocks = <&xin24m>, <&xin24m>, @@ -121,7 +121,7 @@ index 0000000..6e307fc + #clock-cells = <1>; + }; + -+ clk_gates2: gate-clk at 200000d8 { ++ clk_gates2: gate-clk@200000d8 { + compatible = "rockchip,rk2928-gate-clk"; + reg = <0x200000d8 0x4>; + clocks = <&clk_gates2 1>, <&dummy>, @@ -146,7 +146,7 @@ index 0000000..6e307fc + #clock-cells = <1>; + }; + -+ clk_gates3: gate-clk at 200000dc { ++ clk_gates3: gate-clk@200000dc { + compatible = "rockchip,rk2928-gate-clk"; + reg = <0x200000dc 0x4>; + clocks = <&dummy>, <&dummy>, @@ -171,7 +171,7 @@ index 0000000..6e307fc + #clock-cells = <1>; + }; + -+ clk_gates4: gate-clk at 200000e0 { ++ clk_gates4: gate-clk@200000e0 { + compatible = "rockchip,rk2928-gate-clk"; + reg = <0x200000e0 0x4>; + clocks = <&clk_gates2 2>, <&clk_gates2 3>, @@ -196,7 +196,7 @@ index 0000000..6e307fc + #clock-cells = <1>; + }; + -+ clk_gates5: gate-clk at 200000e4 { ++ clk_gates5: gate-clk@200000e4 { + compatible = "rockchip,rk2928-gate-clk"; + reg = <0x200000e4 0x4>; + clocks = <&clk_gates0 3>, <&clk_gates2 1>, @@ -221,7 +221,7 @@ index 0000000..6e307fc + #clock-cells = <1>; + }; + -+ clk_gates6: gate-clk at 200000e8 { ++ clk_gates6: gate-clk@200000e8 { + compatible = "rockchip,rk2928-gate-clk"; + reg = <0x200000e8 0x4>; + clocks = <&clk_gates3 0>, <&clk_gates0 4>, @@ -246,7 +246,7 @@ index 0000000..6e307fc + #clock-cells = <1>; + }; + -+ clk_gates7: gate-clk at 200000ec { ++ clk_gates7: gate-clk@200000ec { + compatible = "rockchip,rk2928-gate-clk"; + reg = <0x200000ec 0x4>; + clocks = <&clk_gates2 2>, <&clk_gates0 4>, @@ -271,7 +271,7 @@ index 0000000..6e307fc + #clock-cells = <1>; + }; + -+ clk_gates8: gate-clk at 200000f0 { ++ clk_gates8: gate-clk@200000f0 { + compatible = "rockchip,rk2928-gate-clk"; + reg = <0x200000f0 0x4>; + clocks = <&clk_gates0 5>, <&clk_gates0 5>, @@ -296,7 +296,7 @@ index 0000000..6e307fc + #clock-cells = <1>; + }; + -+ clk_gates9: gate-clk at 200000f4 { ++ clk_gates9: gate-clk@200000f4 { + compatible = "rockchip,rk2928-gate-clk"; + reg = <0x200000f4 0x4>; + clocks = <&dummy>, <&clk_gates0 5>, diff --git a/a/content_digest b/N1/content_digest index 61dc62d..773043b 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,8 +1,13 @@ "ref\0201306210129.54629.heiko@sntech.de\0" - "From\0heiko@sntech.de (Heiko St\303\274bner)\0" + "ref\0201306210129.54629.heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org\0" + "From\0Heiko St\303\274bner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\0" "Subject\0[PATCH v6 1/3] arm: Add basic clocks for Rockchip rk3066a SoCs\0" "Date\0Fri, 21 Jun 2013 01:30:32 +0200\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org>\0" + "Cc\0Grant Likely <grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>" + devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org + Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org> + " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>\0" "\00:1\0" "b\0" "This adds a basic clock setup for rk3066a SoCs. Only the gates are\n" @@ -15,7 +20,7 @@ "is the propietary Rockchip one that always setups the clocks in the\n" "necessary way.\n" "\n" - "Signed-off-by: Heiko Stuebner <heiko@sntech.de>\n" + "Signed-off-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\n" "---\n" " arch/arm/boot/dts/rk3066a-clocks.dtsi | 299 +++++++++++++++++++++++++++++++++\n" " 1 file changed, 299 insertions(+)\n" @@ -29,7 +34,7 @@ "@@ -0,0 +1,299 @@\n" "+/*\n" "+ * Copyright (c) 2013 MundoReader S.L.\n" - "+ * Author: Heiko Stuebner <heiko@sntech.de>\n" + "+ * Author: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\n" "+ *\n" "+ * This program is free software; you can redistribute it and/or modify\n" "+ * it under the terms of the GNU General Public License as published by\n" @@ -78,7 +83,7 @@ "+\t\t\t#clock-cells = <0>;\n" "+\t\t};\n" "+\n" - "+\t\tclk_gates0: gate-clk at 200000d0 {\n" + "+\t\tclk_gates0: gate-clk@200000d0 {\n" "+\t\t\tcompatible = \"rockchip,rk2928-gate-clk\";\n" "+\t\t\treg = <0x200000d0 0x4>;\n" "+\t\t\tclocks = <&dummy>, <&dummy>,\n" @@ -103,7 +108,7 @@ "+\t\t\t#clock-cells = <1>;\n" "+\t\t};\n" "+\n" - "+\t\tclk_gates1: gate-clk at 200000d4 {\n" + "+\t\tclk_gates1: gate-clk@200000d4 {\n" "+\t\t\tcompatible = \"rockchip,rk2928-gate-clk\";\n" "+\t\t\treg = <0x200000d4 0x4>;\n" "+\t\t\tclocks = <&xin24m>, <&xin24m>,\n" @@ -128,7 +133,7 @@ "+\t\t\t#clock-cells = <1>;\n" "+\t\t};\n" "+\n" - "+\t\tclk_gates2: gate-clk at 200000d8 {\n" + "+\t\tclk_gates2: gate-clk@200000d8 {\n" "+\t\t\tcompatible = \"rockchip,rk2928-gate-clk\";\n" "+\t\t\treg = <0x200000d8 0x4>;\n" "+\t\t\tclocks = <&clk_gates2 1>, <&dummy>,\n" @@ -153,7 +158,7 @@ "+\t\t\t#clock-cells = <1>;\n" "+\t\t};\n" "+\n" - "+\t\tclk_gates3: gate-clk at 200000dc {\n" + "+\t\tclk_gates3: gate-clk@200000dc {\n" "+\t\t\tcompatible = \"rockchip,rk2928-gate-clk\";\n" "+\t\t\treg = <0x200000dc 0x4>;\n" "+\t\t\tclocks = <&dummy>, <&dummy>,\n" @@ -178,7 +183,7 @@ "+\t\t\t#clock-cells = <1>;\n" "+\t\t};\n" "+\n" - "+\t\tclk_gates4: gate-clk at 200000e0 {\n" + "+\t\tclk_gates4: gate-clk@200000e0 {\n" "+\t\t\tcompatible = \"rockchip,rk2928-gate-clk\";\n" "+\t\t\treg = <0x200000e0 0x4>;\n" "+\t\t\tclocks = <&clk_gates2 2>, <&clk_gates2 3>,\n" @@ -203,7 +208,7 @@ "+\t\t\t#clock-cells = <1>;\n" "+\t\t};\n" "+\n" - "+\t\tclk_gates5: gate-clk at 200000e4 {\n" + "+\t\tclk_gates5: gate-clk@200000e4 {\n" "+\t\t\tcompatible = \"rockchip,rk2928-gate-clk\";\n" "+\t\t\treg = <0x200000e4 0x4>;\n" "+\t\t\tclocks = <&clk_gates0 3>, <&clk_gates2 1>,\n" @@ -228,7 +233,7 @@ "+\t\t\t#clock-cells = <1>;\n" "+\t\t};\n" "+\n" - "+\t\tclk_gates6: gate-clk at 200000e8 {\n" + "+\t\tclk_gates6: gate-clk@200000e8 {\n" "+\t\t\tcompatible = \"rockchip,rk2928-gate-clk\";\n" "+\t\t\treg = <0x200000e8 0x4>;\n" "+\t\t\tclocks = <&clk_gates3 0>, <&clk_gates0 4>,\n" @@ -253,7 +258,7 @@ "+\t\t\t#clock-cells = <1>;\n" "+\t\t};\n" "+\n" - "+\t\tclk_gates7: gate-clk at 200000ec {\n" + "+\t\tclk_gates7: gate-clk@200000ec {\n" "+\t\t\tcompatible = \"rockchip,rk2928-gate-clk\";\n" "+\t\t\treg = <0x200000ec 0x4>;\n" "+\t\t\tclocks = <&clk_gates2 2>, <&clk_gates0 4>,\n" @@ -278,7 +283,7 @@ "+\t\t\t#clock-cells = <1>;\n" "+\t\t};\n" "+\n" - "+\t\tclk_gates8: gate-clk at 200000f0 {\n" + "+\t\tclk_gates8: gate-clk@200000f0 {\n" "+\t\t\tcompatible = \"rockchip,rk2928-gate-clk\";\n" "+\t\t\treg = <0x200000f0 0x4>;\n" "+\t\t\tclocks = <&clk_gates0 5>, <&clk_gates0 5>,\n" @@ -303,7 +308,7 @@ "+\t\t\t#clock-cells = <1>;\n" "+\t\t};\n" "+\n" - "+\t\tclk_gates9: gate-clk at 200000f4 {\n" + "+\t\tclk_gates9: gate-clk@200000f4 {\n" "+\t\t\tcompatible = \"rockchip,rk2928-gate-clk\";\n" "+\t\t\treg = <0x200000f4 0x4>;\n" "+\t\t\tclocks = <&dummy>, <&clk_gates0 5>,\n" @@ -329,4 +334,4 @@ "-- \n" 1.7.10.4 -9978e24cf6505b17d517f8067a428bfdb0fcc4644660b67202b1639838d72d55 +38883c6329a8d9523e9483a81e3bee178ae8f24c53d143491cfe11dc22288aad
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