Re: [PATCH 3/3] qemu-xen-trad: IGD passthrough: Expose vendor specific pci cap on host bridge.

[Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>]

On Wed, Jun 19, 2013 at 06:37:06PM +0800, G.R. wrote:
> I'm going to rework this patch to address Jan's concern.
> Here is my proposal, please review and comment before I begin:
> 
> The proposal is to read a shadow copy of the exposed host register into
> the config space of the emulated host bridge and relies on the
> pci_default_read_config() function
> to provide proper access.
> 
> This methodology only works for constant values, which is our case here.
> The exposed value is either read-only or write-locked (for BIOS).
> 
> The only exception is that the PAVPC (0x58) register is write-locked
> but not for BIOS.

So only SeaBIOS or hvmloader should touch it?

> This is exposed for RW and my proposal is to perform write-through in
> the register write-support.

What does PAVPC do? As in if the driver wrote 0xdeadbeef in there what
would happen? Is there a list of the appropiate values it should
accept?

> 
> >
> > Also, why would removing the next capability be correct here,
> > when you're not removing _all_ other capabilities?
> I have no answer about this question. *Jean*, could you help comment
> since this is from your code?


If he doesn't answer - if you don't remove the capability does it
still work?
> 
> Thanks,
> Timothy
> 
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