From: Julian Wollrath <jwollrath@web.de>
To: alexdeucher@gmail.com
Cc: dri-devel@lists.freedesktop.org
Subject: [PATCH 000/165] radeon drm-next patches
Date: Wed, 26 Jun 2013 23:57:56 +0200 [thread overview]
Message-ID: <20130626235756.59f556e6@ilfaris> (raw)
In-Reply-To: <1372253045-17042-1-git-send-email-alexdeucher@gmail.com>
Hi,
I just tried the DPM support out on a E-450 APU (HD6320) and it did not
work like expected. In the terminal everything seemed ok but when I
started a display manager, the screen showed garbage and the system
basically locked up. The radeon and drm related parts of the syslog are
below.
If you need further information, feel free to ask.
Best regards,
Julian Wollrath
[ 14.926970] [drm] Initialized drm 1.1.0 20060810
[ 15.607011] [drm] radeon kernel modesetting enabled.
[ 15.608158] [drm] initializing kernel modesetting (PALM 0x1002:0x9806 0x17AA:0x21EC).
[ 15.608242] [drm] register mmio base: 0xF0300000
[ 15.608247] [drm] register mmio size: 262144
[ 15.608438] ATOM BIOS: Lenovo
[ 15.608544] radeon 0000:00:01.0: VRAM: 384M 0x0000000000000000 - 0x0000000017FFFFFF (384M used)
[ 15.608554] radeon 0000:00:01.0: GTT: 512M 0x0000000018000000 - 0x0000000037FFFFFF
[ 15.609062] [drm] Detected VRAM RAM=384M, BAR=256M
[ 15.609077] [drm] RAM width 32bits DDR
[ 15.609442] [TTM] Zone kernel: Available graphics memory: 1821260 kiB
[ 15.609453] [TTM] Initializing pool allocator
[ 15.609469] [TTM] Initializing DMA pool allocator
[ 15.609553] [drm] radeon: 384M of VRAM memory ready
[ 15.609560] [drm] radeon: 512M of GTT memory ready.
[ 15.785368] radeon 0000:00:01.0: ffff880119401000 unpin not necessary
[ 15.911347] radeon 0000:00:01.0: fence driver on ring 5 use gpu addr 0x0000000000072118 and cpu addr 0xffffc90002ce6118
[ 15.911374] [drm] GART: num cpu pages 131072, num gpu pages 131072
[ 15.915577] [drm] Loading PALM Microcode
[ 16.354967] [drm] PCIE GART of 512M enabled (table at 0x0000000000040000).
[ 16.355272] radeon 0000:00:01.0: WB enabled
[ 16.355287] radeon 0000:00:01.0: fence driver on ring 0 use gpu addr 0x0000000018000c00 and cpu addr 0xffff880115f44c00
[ 16.355297] radeon 0000:00:01.0: fence driver on ring 3 use gpu addr 0x0000000018000c0c and cpu addr 0xffff880115f44c0c
[ 16.359306] radeon 0000:00:01.0: fence driver on ring 5 use gpu addr 0x0000000000177118 and cpu addr 0xffffc90003032118
[ 16.359326] [drm] Supports vblank timestamp caching Rev 1 (10.10.2010).
[ 16.359330] [drm] Driver supports precise vblank timestamp query.
[ 16.359391] radeon 0000:00:01.0: irq 46 for MSI/MSI-X
[ 16.359432] radeon 0000:00:01.0: radeon: using MSI.
[ 16.359528] [drm] radeon: irq initialized.
[ 16.379053] [drm] ring test on 0 succeeded in 1 usecs
[ 16.379120] [drm] ring test on 3 succeeded in 1 usecs
[ 16.434367] [drm] ring test on 5 succeeded in 1 usecs
[ 16.434384] [drm] UVD initialized successfully.
[ 16.455934] [drm] ib test on ring 0 succeeded in 0 usecs
[ 16.455984] [drm] ib test on ring 3 succeeded in 0 usecs
[ 16.476866] [drm] ib test on ring 5 succeeded
[ 16.549696] [drm] radeon atom DIG backlight initialized
[ 16.549718] [drm] Radeon Display Connectors
[ 16.549724] [drm] Connector 0:
[ 16.549731] [drm] LVDS-1
[ 16.549736] [drm] HPD1
[ 16.549744] [drm] DDC: 0x6430 0x6430 0x6434 0x6434 0x6438 0x6438 0x643c 0x643c
[ 16.549748] [drm] Encoders:
[ 16.549753] [drm] LCD1: INTERNAL_UNIPHY
[ 16.549757] [drm] Connector 1:
[ 16.549762] [drm] HDMI-A-1
[ 16.549766] [drm] HPD2
[ 16.549773] [drm] DDC: 0x6440 0x6440 0x6444 0x6444 0x6448 0x6448 0x644c 0x644c
[ 16.549776] [drm] Encoders:
[ 16.549780] [drm] DFP1: INTERNAL_UNIPHY
[ 16.549784] [drm] Connector 2:
[ 16.549788] [drm] VGA-1
[ 16.549795] [drm] DDC: 0x64d8 0x64d8 0x64dc 0x64dc 0x64e0 0x64e0 0x64e4 0x64e4
[ 16.549799] [drm] Encoders:
[ 16.549803] [drm] CRT1: INTERNAL_KLDSCP_DAC1
[ 16.549900] [drm] Internal thermal controller without fan control
[ 16.550073] == power state 0 ==
[ 16.550079] ui class: none
[ 16.550085] internal class: uvd_hd
[ 16.550091] caps:
[ 16.550096] uvd vclk: 38824 dclk: 30000
[ 16.550102] power level 0 sclk: 27500 vddc: 875
[ 16.550106] status:
[ 16.550110] == power state 1 ==
[ 16.550113] ui class: none
[ 16.550117] internal class: uvd
[ 16.550122] caps:
[ 16.550127] uvd vclk: 55000 dclk: 41250
[ 16.550132] power level 0 sclk: 50770 vddc: 950
[ 16.550135] status:
[ 16.550139] == power state 2 ==
[ 16.550142] ui class: battery
[ 16.550146] internal class: none
[ 16.550151] caps:
[ 16.550155] uvd vclk: 0 dclk: 0
[ 16.550160] power level 0 sclk: 27500 vddc: 875
[ 16.550163] status:
[ 16.550167] == power state 3 ==
[ 16.550170] ui class: performance
[ 16.550174] internal class: none
[ 16.550179] caps:
[ 16.550184] uvd vclk: 0 dclk: 0
[ 16.550188] power level 0 sclk: 27500 vddc: 875
[ 16.550193] power level 1 sclk: 50770 vddc: 950
[ 16.550196] status:
[ 16.550200] == power state 4 ==
[ 16.550203] ui class: none
[ 16.550207] internal class: boot
[ 16.550212] caps:
[ 16.550216] uvd vclk: 0 dclk: 0
[ 16.550221] power level 0 sclk: 20000 vddc: 975
[ 16.550224] status: c r b
[ 16.550232] == power state 5 ==
[ 16.550235] ui class: none
[ 16.550239] internal class: thermal
[ 16.550243] caps:
[ 16.550248] uvd vclk: 0 dclk: 0
[ 16.550252] power level 0 sclk: 17369 vddc: 875
[ 16.550255] status:
[ 16.550263] [drm] Found smc ucode version: 0x00010601
[ 16.576523] switching from power state:
[ 16.576539] ui class: none
[ 16.576545] internal class: boot
[ 16.576551] caps:
[ 16.576557] uvd vclk: 0 dclk: 0
[ 16.576565] power level 0 sclk: 20000 vddc: 975
[ 16.576569] status: c b
[ 16.576575] switching to power state:
[ 16.576578] ui class: performance
[ 16.576582] internal class: none
[ 16.576588] caps:
[ 16.576592] uvd vclk: 0 dclk: 0
[ 16.576598] power level 0 sclk: 27500 vddc: 875
[ 16.576603] power level 1 sclk: 50770 vddc: 950
[ 16.576606] status: r
[ 16.576735] [drm] radeon: dpm initialized
[ 17.000309] [drm] fb mappable at 0xE0378000
[ 17.000317] [drm] vram apper at 0xE0000000
[ 17.000319] [drm] size 4325376
[ 17.000322] [drm] fb depth is 24
[ 17.000324] [drm] pitch is 5632
[ 17.000438] fbcon: radeondrmfb (fb0) is primary device
[ 17.563999] Console: switching to colour frame buffer device 170x48
[ 17.577133] radeon 0000:00:01.0: fb0: radeondrmfb frame buffer device
[ 17.577141] radeon 0000:00:01.0: registered panic notifier
[ 17.577820] [drm] Initialized radeon 2.34.0 20080528 for 0000:00:01.0 on minor 0
[ 159.318231] radeon 0000:00:01.0: GPU lockup CP stall for more than 10000msec
[ 159.318252] radeon 0000:00:01.0: GPU lockup (waiting for 0x0000000000000004 last fence id 0x0000000000000001)
[ 159.369796] radeon 0000:00:01.0: fence driver on ring 5 use gpu addr 0x0000000000177118 and cpu addr 0xffffc9000301b118
[ 159.370844] radeon 0000:00:01.0: Saved 87 dwords of commands on ring 0.
[ 159.370856] radeon 0000:00:01.0: GPU softreset: 0x00000009
[ 159.370861] radeon 0000:00:01.0: GRBM_STATUS = 0xB2433828
[ 159.370865] radeon 0000:00:01.0: GRBM_STATUS_SE0 = 0x08000007
[ 159.370869] radeon 0000:00:01.0: GRBM_STATUS_SE1 = 0x00000007
[ 159.370872] radeon 0000:00:01.0: SRBM_STATUS = 0x20000040
[ 159.370876] radeon 0000:00:01.0: SRBM_STATUS2 = 0x00000000
[ 159.370880] radeon 0000:00:01.0: R_008674_CP_STALLED_STAT1 = 0x00000000
[ 159.370884] radeon 0000:00:01.0: R_008678_CP_STALLED_STAT2 = 0x40000000
[ 159.370888] radeon 0000:00:01.0: R_00867C_CP_BUSY_STAT = 0x00008000
[ 159.370891] radeon 0000:00:01.0: R_008680_CP_STAT = 0x80228643
[ 159.370895] radeon 0000:00:01.0: R_00D034_DMA_STATUS_REG = 0x44C83D57
[ 159.386016] radeon 0000:00:01.0: GRBM_SOFT_RESET=0x00007F6B
[ 159.386093] radeon 0000:00:01.0: SRBM_SOFT_RESET=0x00000100
[ 159.387279] radeon 0000:00:01.0: GRBM_STATUS = 0x00003828
[ 159.387282] radeon 0000:00:01.0: GRBM_STATUS_SE0 = 0x00000007
[ 159.387286] radeon 0000:00:01.0: GRBM_STATUS_SE1 = 0x00000007
[ 159.387289] radeon 0000:00:01.0: SRBM_STATUS = 0x20000040
[ 159.387293] radeon 0000:00:01.0: SRBM_STATUS2 = 0x00000000
[ 159.387296] radeon 0000:00:01.0: R_008674_CP_STALLED_STAT1 = 0x00000000
[ 159.387300] radeon 0000:00:01.0: R_008678_CP_STALLED_STAT2 = 0x00000000
[ 159.387303] radeon 0000:00:01.0: R_00867C_CP_BUSY_STAT = 0x00000000
[ 159.387307] radeon 0000:00:01.0: R_008680_CP_STAT = 0x00000000
[ 159.387310] radeon 0000:00:01.0: R_00D034_DMA_STATUS_REG = 0x44C83D57
[ 159.387316] radeon 0000:00:01.0: GPU reset succeeded, trying to resume
[ 159.407287] [drm] PCIE GART of 512M enabled (table at 0x0000000000040000).
[ 159.407562] radeon 0000:00:01.0: WB enabled
[ 159.407576] radeon 0000:00:01.0: fence driver on ring 0 use gpu addr 0x0000000018000c00 and cpu addr 0xffff880115f44c00
[ 159.407587] radeon 0000:00:01.0: fence driver on ring 3 use gpu addr 0x0000000018000c0c and cpu addr 0xffff880115f44c0c
[ 159.410849] radeon 0000:00:01.0: fence driver on ring 5 use gpu addr 0x0000000000177118 and cpu addr 0xffffc90003eb2118
[ 159.427563] [drm] ring test on 0 succeeded in 1 usecs
[ 159.427634] [drm] ring test on 3 succeeded in 1 usecs
[ 159.472928] [drm] ring test on 5 succeeded in 1 usecs
[ 159.472958] [drm] UVD initialized successfully.
[ 164.422044] SysRq : Keyboard mode set to system default
[ 164.646822] SysRq : Terminate All Tasks
[ 14.301299] [drm] Initialized drm 1.1.0 20060810
[ 14.906930] [drm] radeon kernel modesetting enabled.
[ 14.975218] [drm] initializing kernel modesetting (PALM 0x1002:0x9806 0x17AA:0x21EC).
[ 14.975271] [drm] register mmio base: 0xF0300000
[ 14.975273] [drm] register mmio size: 262144
[ 14.975377] ATOM BIOS: Lenovo
[ 14.975453] radeon 0000:00:01.0: VRAM: 384M 0x0000000000000000 - 0x0000000017FFFFFF (384M used)
[ 14.975459] radeon 0000:00:01.0: GTT: 512M 0x0000000018000000 - 0x0000000037FFFFFF
[ 14.975657] [drm] Detected VRAM RAM=384M, BAR=256M
[ 14.975667] [drm] RAM width 32bits DDR
[ 14.976352] [TTM] Zone kernel: Available graphics memory: 1821260 kiB
[ 14.976356] [TTM] Initializing pool allocator
[ 14.976364] [TTM] Initializing DMA pool allocator
[ 14.976404] [drm] radeon: 384M of VRAM memory ready
[ 14.976408] [drm] radeon: 512M of GTT memory ready.
[ 15.719064] radeon 0000:00:01.0: ffff8801196f1800 unpin not necessary
[ 15.856057] radeon 0000:00:01.0: fence driver on ring 5 use gpu addr 0x0000000000072118 and cpu addr 0xffffc90002ce6118
[ 15.856075] [drm] GART: num cpu pages 131072, num gpu pages 131072
[ 15.858815] [drm] Loading PALM Microcode
[ 16.363243] [drm] PCIE GART of 512M enabled (table at 0x0000000000040000).
[ 16.363537] radeon 0000:00:01.0: WB enabled
[ 16.363545] radeon 0000:00:01.0: fence driver on ring 0 use gpu addr 0x0000000018000c00 and cpu addr 0xffff880115f8bc00
[ 16.363550] radeon 0000:00:01.0: fence driver on ring 3 use gpu addr 0x0000000018000c0c and cpu addr 0xffff880115f8bc0c
[ 16.365611] radeon 0000:00:01.0: fence driver on ring 5 use gpu addr 0x0000000000177118 and cpu addr 0xffffc90002ab2118
[ 16.365623] [drm] Supports vblank timestamp caching Rev 1 (10.10.2010).
[ 16.365626] [drm] Driver supports precise vblank timestamp query.
[ 16.365666] radeon 0000:00:01.0: irq 46 for MSI/MSI-X
[ 16.365692] radeon 0000:00:01.0: radeon: using MSI.
[ 16.365733] [drm] radeon: irq initialized.
[ 16.383123] [drm] ring test on 0 succeeded in 1 usecs
[ 16.383199] [drm] ring test on 3 succeeded in 1 usecs
[ 16.438468] [drm] ring test on 5 succeeded in 1 usecs
[ 16.438479] [drm] UVD initialized successfully.
[ 16.459644] [drm] ib test on ring 0 succeeded in 0 usecs
[ 16.459693] [drm] ib test on ring 3 succeeded in 0 usecs
[ 16.480537] [drm] ib test on ring 5 succeeded
[ 16.556037] [drm] radeon atom DIG backlight initialized
[ 16.556058] [drm] Radeon Display Connectors
[ 16.556064] [drm] Connector 0:
[ 16.556072] [drm] LVDS-1
[ 16.556077] [drm] HPD1
[ 16.556085] [drm] DDC: 0x6430 0x6430 0x6434 0x6434 0x6438 0x6438 0x643c 0x643c
[ 16.556089] [drm] Encoders:
[ 16.556094] [drm] LCD1: INTERNAL_UNIPHY
[ 16.556099] [drm] Connector 1:
[ 16.556104] [drm] HDMI-A-1
[ 16.556107] [drm] HPD2
[ 16.556114] [drm] DDC: 0x6440 0x6440 0x6444 0x6444 0x6448 0x6448 0x644c 0x644c
[ 16.556118] [drm] Encoders:
[ 16.556122] [drm] DFP1: INTERNAL_UNIPHY
[ 16.556126] [drm] Connector 2:
[ 16.556131] [drm] VGA-1
[ 16.556137] [drm] DDC: 0x64d8 0x64d8 0x64dc 0x64dc 0x64e0 0x64e0 0x64e4 0x64e4
[ 16.556141] [drm] Encoders:
[ 16.556145] [drm] CRT1: INTERNAL_KLDSCP_DAC1
[ 16.556242] [drm] Internal thermal controller without fan control
[ 16.556392] == power state 0 ==
[ 16.556398] ui class: none
[ 16.556404] internal class: uvd_hd
[ 16.556410] caps:
[ 16.556416] uvd vclk: 38824 dclk: 30000
[ 16.556422] power level 0 sclk: 27500 vddc: 875
[ 16.556425] status:
[ 16.556430] == power state 1 ==
[ 16.556433] ui class: none
[ 16.556437] internal class: uvd
[ 16.556442] caps:
[ 16.556447] uvd vclk: 55000 dclk: 41250
[ 16.556452] power level 0 sclk: 50770 vddc: 950
[ 16.556455] status:
[ 16.556459] == power state 2 ==
[ 16.556462] ui class: battery
[ 16.556466] internal class: none
[ 16.556471] caps:
[ 16.556475] uvd vclk: 0 dclk: 0
[ 16.556480] power level 0 sclk: 27500 vddc: 875
[ 16.556483] status:
[ 16.556487] == power state 3 ==
[ 16.556491] ui class: performance
[ 16.556494] internal class: none
[ 16.556499] caps:
[ 16.556504] uvd vclk: 0 dclk: 0
[ 16.556509] power level 0 sclk: 27500 vddc: 875
[ 16.556514] power level 1 sclk: 50770 vddc: 950
[ 16.556517] status:
[ 16.556521] == power state 4 ==
[ 16.556524] ui class: none
[ 16.556528] internal class: boot
[ 16.556533] caps:
[ 16.556537] uvd vclk: 0 dclk: 0
[ 16.556542] power level 0 sclk: 20000 vddc: 975
[ 16.556545] status: c r b
[ 16.556553] == power state 5 ==
[ 16.556556] ui class: none
[ 16.556560] internal class: thermal
[ 16.556564] caps:
[ 16.556569] uvd vclk: 0 dclk: 0
[ 16.556574] power level 0 sclk: 17369 vddc: 875
[ 16.556577] status:
[ 16.556584] [drm] Found smc ucode version: 0x00010601
[ 16.577725] switching from power state:
[ 16.577737] ui class: none
[ 16.577740] internal class: boot
[ 16.577744] caps:
[ 16.577747] uvd vclk: 0 dclk: 0
[ 16.577751] power level 0 sclk: 20000 vddc: 975
[ 16.577753] status: c b
[ 16.577757] switching to power state:
[ 16.577758] ui class: performance
[ 16.577760] internal class: none
[ 16.577763] caps:
[ 16.577765] uvd vclk: 0 dclk: 0
[ 16.577768] power level 0 sclk: 27500 vddc: 875
[ 16.577771] power level 1 sclk: 50770 vddc: 950
[ 16.577772] status: r
[ 16.577868] [drm] radeon: dpm initialized
[ 16.694706] ieee80211 phy0: Selected rate control algorithm 'iwl-agn-rs'
[ 16.997044] [drm] fb mappable at 0xE0378000
[ 16.997057] [drm] vram apper at 0xE0000000
[ 16.997062] [drm] size 4325376
[ 16.997067] [drm] fb depth is 24
[ 16.997072] [drm] pitch is 5632
[ 16.997267] fbcon: radeondrmfb (fb0) is primary device
[ 17.565597] Console: switching to colour frame buffer device 170x48
[ 17.578692] radeon 0000:00:01.0: fb0: radeondrmfb frame buffer device
[ 17.578701] radeon 0000:00:01.0: registered panic notifier
[ 17.579385] [drm] Initialized radeon 2.34.0 20080528 for 0000:00:01.0 on minor 0
[ 195.823063] radeon 0000:00:01.0: GPU lockup CP stall for more than 10000msec
[ 195.827260] radeon 0000:00:01.0: GPU lockup (waiting for 0x0000000000000004 last fence id 0x0000000000000001)
[ 195.879857] radeon 0000:00:01.0: fence driver on ring 5 use gpu addr 0x0000000000177118 and cpu addr 0xffffc90002832118
[ 195.880922] radeon 0000:00:01.0: Saved 87 dwords of commands on ring 0.
[ 195.880935] radeon 0000:00:01.0: GPU softreset: 0x00000009
[ 195.880941] radeon 0000:00:01.0: GRBM_STATUS = 0xB2433828
[ 195.880946] radeon 0000:00:01.0: GRBM_STATUS_SE0 = 0x08000007
[ 195.880951] radeon 0000:00:01.0: GRBM_STATUS_SE1 = 0x00000007
[ 195.880956] radeon 0000:00:01.0: SRBM_STATUS = 0x20000040
[ 195.880960] radeon 0000:00:01.0: SRBM_STATUS2 = 0x00000000
[ 195.880965] radeon 0000:00:01.0: R_008674_CP_STALLED_STAT1 = 0x00000000
[ 195.880970] radeon 0000:00:01.0: R_008678_CP_STALLED_STAT2 = 0x40000000
[ 195.880974] radeon 0000:00:01.0: R_00867C_CP_BUSY_STAT = 0x00008000
[ 195.880979] radeon 0000:00:01.0: R_008680_CP_STAT = 0x80228643
[ 195.880983] radeon 0000:00:01.0: R_00D034_DMA_STATUS_REG = 0x44C83D57
[ 195.895865] radeon 0000:00:01.0: GRBM_SOFT_RESET=0x00007F6B
[ 195.895921] radeon 0000:00:01.0: SRBM_SOFT_RESET=0x00000100
[ 195.897108] radeon 0000:00:01.0: GRBM_STATUS = 0x00003828
[ 195.897113] radeon 0000:00:01.0: GRBM_STATUS_SE0 = 0x00000007
[ 195.897117] radeon 0000:00:01.0: GRBM_STATUS_SE1 = 0x00000007
[ 195.897121] radeon 0000:00:01.0: SRBM_STATUS = 0x20000040
[ 195.897126] radeon 0000:00:01.0: SRBM_STATUS2 = 0x00000000
[ 195.897130] radeon 0000:00:01.0: R_008674_CP_STALLED_STAT1 = 0x00000000
[ 195.897134] radeon 0000:00:01.0: R_008678_CP_STALLED_STAT2 = 0x00000000
[ 195.897138] radeon 0000:00:01.0: R_00867C_CP_BUSY_STAT = 0x00000000
[ 195.897143] radeon 0000:00:01.0: R_008680_CP_STAT = 0x00000000
[ 195.897147] radeon 0000:00:01.0: R_00D034_DMA_STATUS_REG = 0x44C83D57
[ 195.897154] radeon 0000:00:01.0: GPU reset succeeded, trying to resume
[ 195.917323] [drm] PCIE GART of 512M enabled (table at 0x0000000000040000).
[ 195.917553] radeon 0000:00:01.0: WB enabled
[ 195.917567] radeon 0000:00:01.0: fence driver on ring 0 use gpu addr 0x0000000018000c00 and cpu addr 0xffff880115f8bc00
[ 195.917578] radeon 0000:00:01.0: fence driver on ring 3 use gpu addr 0x0000000018000c0c and cpu addr 0xffff880115f8bc0c
[ 195.920890] radeon 0000:00:01.0: fence driver on ring 5 use gpu addr 0x0000000000177118 and cpu addr 0xffffc90003c32118
[ 195.937779] [drm] ring test on 0 succeeded in 1 usecs
[ 195.937858] [drm] ring test on 3 succeeded in 1 usecs
[ 195.983131] [drm] ring test on 5 succeeded in 1 usecs
[ 195.983148] [drm] UVD initialized successfully.
[ 206.009333] radeon 0000:00:01.0: GPU lockup CP stall for more than 10000msec
[ 206.013681] radeon 0000:00:01.0: GPU lockup (waiting for 0x0000000000000005 last fence id 0x0000000000000001)
[ 206.013692] [drm:r600_ib_test] *ERROR* radeon: fence wait failed (-35).
[ 206.018028] [drm:radeon_ib_ring_tests] *ERROR* radeon: failed testing IB on GFX ring (-35).
[ 206.022364] radeon 0000:00:01.0: ib ring test failed (-35).
[ 206.075249] radeon 0000:00:01.0: fence driver on ring 5 use gpu addr 0x0000000000177118 and cpu addr 0xffffc90002832118
[ 206.076352] radeon 0000:00:01.0: GPU softreset: 0x00000009
[ 206.076362] radeon 0000:00:01.0: GRBM_STATUS = 0xB3533828
[ 206.076370] radeon 0000:00:01.0: GRBM_STATUS_SE0 = 0x2C000007
[ 206.076378] radeon 0000:00:01.0: GRBM_STATUS_SE1 = 0x00000007
[ 206.076386] radeon 0000:00:01.0: SRBM_STATUS = 0x20000040
[ 206.076393] radeon 0000:00:01.0: SRBM_STATUS2 = 0x00000000
[ 206.076401] radeon 0000:00:01.0: R_008674_CP_STALLED_STAT1 = 0x00000000
[ 206.076408] radeon 0000:00:01.0: R_008678_CP_STALLED_STAT2 = 0x400C0000
[ 206.076415] radeon 0000:00:01.0: R_00867C_CP_BUSY_STAT = 0x00048000
[ 206.076422] radeon 0000:00:01.0: R_008680_CP_STAT = 0x80268643
[ 206.076429] radeon 0000:00:01.0: R_00D034_DMA_STATUS_REG = 0x44C83D57
[ 206.076620] radeon 0000:00:01.0: GRBM_SOFT_RESET=0x00007F6B
[ 206.076678] radeon 0000:00:01.0: SRBM_SOFT_RESET=0x00000100
[ 206.077871] radeon 0000:00:01.0: GRBM_STATUS = 0x00003828
[ 206.077878] radeon 0000:00:01.0: GRBM_STATUS_SE0 = 0x00000007
[ 206.077885] radeon 0000:00:01.0: GRBM_STATUS_SE1 = 0x00000007
[ 206.077892] radeon 0000:00:01.0: SRBM_STATUS = 0x20000040
[ 206.077899] radeon 0000:00:01.0: SRBM_STATUS2 = 0x00000000
[ 206.077905] radeon 0000:00:01.0: R_008674_CP_STALLED_STAT1 = 0x00000000
[ 206.077912] radeon 0000:00:01.0: R_008678_CP_STALLED_STAT2 = 0x00000000
[ 206.077919] radeon 0000:00:01.0: R_00867C_CP_BUSY_STAT = 0x00000000
[ 206.077926] radeon 0000:00:01.0: R_008680_CP_STAT = 0x00000000
[ 206.077932] radeon 0000:00:01.0: R_00D034_DMA_STATUS_REG = 0x44C83D57
[ 206.077943] radeon 0000:00:01.0: GPU reset succeeded, trying to resume
[ 206.082896] [drm] PCIE GART of 512M enabled (table at 0x0000000000040000).
[ 206.083120] radeon 0000:00:01.0: WB enabled
[ 206.083134] radeon 0000:00:01.0: fence driver on ring 0 use gpu addr 0x0000000018000c00 and cpu addr 0xffff880115f8bc00
[ 206.083143] radeon 0000:00:01.0: fence driver on ring 3 use gpu addr 0x0000000018000c0c and cpu addr 0xffff880115f8bc0c
[ 206.086489] radeon 0000:00:01.0: fence driver on ring 5 use gpu addr 0x0000000000177118 and cpu addr 0xffffc90003c32118
[ 206.103118] [drm] ring test on 0 succeeded in 1 usecs
[ 206.103188] [drm] ring test on 3 succeeded in 1 usecs
[ 206.148514] [drm] ring test on 5 succeeded in 1 usecs
[ 206.148531] [drm] UVD initialized successfully.
[ 206.867862] SysRq : Keyboard mode set to system default
[ 207.151608] SysRq : Terminate All Tasks
next prev parent reply other threads:[~2013-06-26 22:03 UTC|newest]
Thread overview: 142+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-26 13:21 [PATCH 000/165] radeon drm-next patches alexdeucher
2013-06-26 12:55 ` Jerome Glisse
2013-06-26 13:21 ` [PATCH 001/165] drm/radeon: fix AVI infoframe generation alexdeucher
2013-06-26 13:21 ` [PATCH 002/165] drm/radeon: add backlight quirk for hybrid mac alexdeucher
2013-06-26 13:21 ` [PATCH 003/165] drm/radeon: add a reset work handler alexdeucher
2013-06-26 13:21 ` [PATCH 004/165] drm/radeon: add CIK chip families alexdeucher
2013-06-26 13:21 ` [PATCH 005/165] drm/radeon: add DCE8 macro for CIK alexdeucher
2013-06-26 13:21 ` [PATCH 006/165] drm/radeon: adapt to PCI BAR changes on CIK alexdeucher
2013-06-26 13:21 ` [PATCH 007/165] drm/radeon: add gpu init support for CIK (v9) alexdeucher
2013-06-26 13:21 ` [PATCH 008/165] drm/radeon: Add support for CIK GPU reset (v2) alexdeucher
2013-06-26 13:21 ` [PATCH 009/165] drm/radeon: add support for MC/VM setup on CIK (v6) alexdeucher
2013-06-26 13:21 ` [PATCH 010/165] drm/radeon/cik: stop page faults from hanging the system (v2) alexdeucher
2013-06-26 13:21 ` [PATCH 011/165] drm/radeon: add initial ucode loading for CIK (v5) alexdeucher
2013-06-26 13:21 ` [PATCH 012/165] drm/radeon: add support mc ucode loading on CIK (v2) alexdeucher
2013-06-26 13:21 ` [PATCH 013/165] drm/radeon: Add CP init for CIK (v7) alexdeucher
2013-06-26 13:21 ` [PATCH 014/165] drm/radeon: add IB and fence dispatch functions for CIK gfx (v7) alexdeucher
2013-06-26 13:21 ` [PATCH 015/165] drm/radeon: add ring and IB tests for CIK (v3) alexdeucher
2013-06-26 13:21 ` [PATCH 016/165] drm/radeon: implement async vm_flush for the CP (v7) alexdeucher
2013-06-26 13:21 ` [PATCH 017/165] drm/radeon: Add support for RLC init on CIK (v4) alexdeucher
2013-06-26 13:21 ` [PATCH 018/165] drm/radeon: add support for interrupts on CIK (v5) alexdeucher
2013-06-26 13:21 ` [PATCH 019/165] drm/radeon/cik: log and handle VM page fault interrupts alexdeucher
2013-06-26 13:21 ` [PATCH 020/165] drm/radeon/cik: add support for sDMA dma engines (v8) alexdeucher
2013-06-26 13:21 ` [PATCH 021/165] drm/radeon: implement async vm_flush for the sDMA (v6) alexdeucher
2013-06-26 13:21 ` [PATCH 022/165] drm/radeon/cik: add support for doing async VM pt updates (v5) alexdeucher
2013-06-26 13:21 ` [PATCH 023/165] drm/radeon/cik: fill in startup/shutdown callbacks (v4) alexdeucher
2013-06-26 15:03 ` Christian König
2013-06-26 13:21 ` [PATCH 024/165] drm/radeon: upstream ObjectID.h updates (v2) alexdeucher
2013-06-26 13:21 ` [PATCH 025/165] drm/radeon: upstream atombios.h " alexdeucher
2013-06-26 13:21 ` [PATCH 026/165] drm/radeon: atombios power table " alexdeucher
2013-06-26 13:21 ` [PATCH 027/165] drm/radeon: handle the integrated thermal controller on CI alexdeucher
2013-06-26 13:21 ` [PATCH 028/165] drm/radeon: update power state parsing for CI alexdeucher
2013-06-26 13:21 ` [PATCH 029/165] drm/radeon/dce8: add support for display watermark setup alexdeucher
2013-06-26 13:21 ` [PATCH 030/165] drm/radeon/cik: add hw cursor support (v2) alexdeucher
2013-06-26 13:21 ` [PATCH 031/165] drm/radeon/dce8: properly handle interlaced timing alexdeucher
2013-06-26 13:21 ` [PATCH 032/165] drm/radeon/dce8: crtc_set_base updates alexdeucher
2013-06-26 13:21 ` [PATCH 033/165] drm/radeon/atom: add DCE8 encoder support alexdeucher
2013-06-26 13:21 ` [PATCH 034/165] drm/radeon/atom: add support for new DVO tables alexdeucher
2013-06-26 13:21 ` [PATCH 035/165] drm/radeon: update DISPCLK programming for DCE8 alexdeucher
2013-06-26 13:21 ` [PATCH 036/165] drm/radeon: add support pll selection for DCE8 (v4) alexdeucher
2013-06-26 13:21 ` [PATCH 037/165] drm/radeon: Handle PPLL0 powerdown on DCE8 alexdeucher
2013-06-26 13:21 ` [PATCH 038/165] drm/radeon: use frac fb div " alexdeucher
2013-06-26 13:21 ` [PATCH 039/165] drm/radeon: add SS override support for KB/KV alexdeucher
2013-06-26 13:22 ` [PATCH 040/165] drm/radeon: Update radeon_info_ioctl for CIK (v2) alexdeucher
2013-06-26 13:22 ` [PATCH 041/165] drm/radeon: add get_gpu_clock_counter() callback for cik alexdeucher
2013-06-26 13:22 ` [PATCH 042/165] drm/radeon: update CIK soft reset alexdeucher
2013-06-26 13:22 ` [PATCH 043/165] drm/radeon: add indirect register accessors for SMC registers alexdeucher
2013-06-26 13:22 ` [PATCH 044/165] drm/radeon: add get_xclk() callback for CIK alexdeucher
2013-06-26 13:22 ` [PATCH 045/165] drm/radeon/cik: add pcie_port indirect register accessors alexdeucher
2013-06-26 13:22 ` [PATCH 046/165] drm/radeon: update radeon_atom_get_clock_dividers() for SI alexdeucher
2013-06-26 13:22 ` [PATCH 047/165] drm/radeon: update radeon_atom_get_clock_dividers for CIK alexdeucher
2013-06-26 13:22 ` [PATCH 048/165] drm/radeon: add UVD support for CIK (v3) alexdeucher
2013-06-26 13:22 ` [PATCH 049/165] drm/radeon/cik: add srbm_select function alexdeucher
2013-06-26 13:22 ` [PATCH 050/165] drm/radeon: use callbacks for ring pointer handling alexdeucher
2013-06-26 15:31 ` Christian König
2013-06-26 13:22 ` [PATCH 051/165] drm/radeon: implement simple doorbell page allocator alexdeucher
2013-06-26 12:57 ` Jerome Glisse
2013-06-26 18:38 ` Alex Deucher
2013-06-26 13:22 ` [PATCH 052/165] drm/radeon/cik: Add support for compute queues (v2) alexdeucher
2013-06-26 10:08 ` Jerome Glisse
2013-06-26 13:22 ` [PATCH 053/165] drm/radeon/cik: switch to type3 nop packet for compute rings alexdeucher
2013-06-26 10:10 ` Jerome Glisse
2013-06-26 13:22 ` [PATCH 054/165] drm/radeon: fix up ring functions " alexdeucher
2013-06-26 13:22 ` [PATCH 055/165] drm/radeon/cik: add support for compute interrupts alexdeucher
2013-06-26 13:22 ` [PATCH 056/165] drm/radeon/cik: add support for golden register init alexdeucher
2013-06-26 13:22 ` [PATCH 057/165] drm/radeon: add radeon_asic struct for CIK (v11) alexdeucher
2013-06-26 13:22 ` [PATCH 058/165] drm/radeon: add cik tile mode array query alexdeucher
2013-06-26 13:22 ` [PATCH 059/165] drm/radeon: add current Bonaire PCI ids alexdeucher
2013-06-26 13:22 ` [PATCH 060/165] drm/radeon: add current KB pci ids alexdeucher
2013-06-26 13:22 ` [PATCH 061/165] drm/radeon/kms: add accessors for RCU indirect space alexdeucher
2013-06-26 13:22 ` [PATCH 062/165] drm/radeon/evergreen: add indirect register accessors for CG registers alexdeucher
2013-06-26 13:22 ` [PATCH 063/165] drm/radeon: make get_temperature functions a callback alexdeucher
2013-06-26 13:22 ` [PATCH 064/165] drm/radeon: add support for thermal sensor on tn alexdeucher
2013-06-26 13:22 ` [PATCH 065/165] drm/radeon/kms: move ucode defines to a separate header alexdeucher
2013-06-26 13:22 ` [PATCH 066/165] drm/radeon: properly set up the RLC on ON/LN/TN (v3) alexdeucher
2013-06-26 13:22 ` [PATCH 067/165] drm/radeon/kms: add atom helper functions for dpm (v3) alexdeucher
2013-06-26 13:22 ` [PATCH 068/165] drm/radeon/kms: add new asic struct for rv6xx (v3) alexdeucher
2013-06-26 13:22 ` [PATCH 069/165] drm/radeon/kms: add common dpm infrastructure alexdeucher
2013-06-26 10:27 ` Jerome Glisse
2013-06-27 13:52 ` K. Schnass
2013-06-26 13:22 ` [PATCH 070/165] drm/radeon/kms: fix up rs780/rs880 display watermark calc for dpm alexdeucher
2013-06-26 13:22 ` [PATCH 071/165] drm/radeon/kms: fix up 6xx/7xx " alexdeucher
2013-06-26 13:22 ` [PATCH 072/165] drm/radeon/kms: fix up dce4/5 " alexdeucher
2013-06-26 13:22 ` [PATCH 073/165] drm/radeon/kms: fix up dce6 " alexdeucher
2013-06-26 13:22 ` [PATCH 074/165] drm/radeon/kms: add common r600 dpm functions alexdeucher
2013-06-26 13:22 ` [PATCH 075/165] drm/radeon/kms: add dpm support for rs780/rs880 alexdeucher
2013-06-26 10:46 ` Jerome Glisse
2013-06-26 18:19 ` Alex Deucher
2013-06-26 13:18 ` Jerome Glisse
2013-06-26 18:41 ` Alex Deucher
2013-06-26 13:22 ` [PATCH 076/165] drm/radeon/kms: add dpm support for rv6xx alexdeucher
2013-06-26 16:45 ` Christian König
2013-06-26 13:22 ` [PATCH 077/165] drm/radeon/kms: add dpm support for rv7xx (v2) alexdeucher
2013-06-26 13:22 ` [PATCH 078/165] drm/radeon/kms: add dpm support for evergreen (v2) alexdeucher
2013-06-26 13:22 ` [PATCH 079/165] drm/radeon/kms: add dpm support for btc (v2) alexdeucher
2013-06-26 13:22 ` [PATCH 080/165] drm/radeon/kms: add dpm support for sumo asics alexdeucher
2013-06-26 11:19 ` Jerome Glisse
2013-06-26 13:22 ` [PATCH 081/165] drm/radeon/kms: add dpm support for trinity asics alexdeucher
2013-06-26 13:22 ` [PATCH 082/165] drm/radeon/dpm: let atom control display phy powergating alexdeucher
2013-06-26 13:22 ` [PATCH 083/165] drm/radeon: add dpm UVD handling for r7xx asics alexdeucher
2013-06-26 13:22 ` [PATCH 084/165] drm/radeon: add dpm UVD handling for evergreen/btc asics alexdeucher
2013-06-26 13:22 ` [PATCH 085/165] drm/radeon: add dpm UVD handling for sumo asics alexdeucher
2013-06-26 13:22 ` [PATCH 086/165] drm/radeon: add dpm UVD handling for TN asics (v2) alexdeucher
2013-06-26 13:22 ` [PATCH 087/165] drm/radeon/kms: enable UVD as needed (v9) alexdeucher
2013-06-26 13:22 ` [PATCH 088/165] drm/radeon/dpm: add helpers for extended power tables (v2) alexdeucher
2013-06-26 13:22 ` [PATCH 089/165] drm/radeon/dpm: track whether we are on AC or battery alexdeucher
2013-06-26 13:22 ` [PATCH 090/165] drm/radeon/dpm: fixup dynamic state adjust for sumo alexdeucher
2013-06-26 13:22 ` [PATCH 091/165] drm/radeon/dpm: fixup dynamic state adjust for TN alexdeucher
2013-06-26 13:22 ` [PATCH 092/165] drm/radeon/dpm: fixup dynamic state adjust for btc (v2) alexdeucher
2013-06-26 13:22 ` [PATCH 093/165] drm/radeon/kms: add dpm support for cayman alexdeucher
2013-06-26 11:29 ` Jerome Glisse
2013-06-26 13:22 ` [PATCH 094/165] drm/radeon/cayman: update tdp limits in set_power_state alexdeucher
2013-06-26 13:22 ` [PATCH 095/165] drm/radeon/dpm/rs780: restructure code alexdeucher
2013-06-26 13:22 ` [PATCH 096/165] drm/radeon/dpm/rv6xx: " alexdeucher
2013-06-26 13:22 ` [PATCH 097/165] drm/radeon/dpm/rv7xx: " alexdeucher
2013-06-26 13:22 ` [PATCH 098/165] drm/radeon/dpm/evergreen: " alexdeucher
2013-06-26 13:22 ` [PATCH 099/165] drm/radeon/dpm/btc: " alexdeucher
2013-06-26 13:23 ` [PATCH 100/165] drm/radeon/dpm/cayman: " alexdeucher
2013-06-26 13:23 ` [PATCH 101/165] drm/radeon/dpm/sumo: " alexdeucher
2013-06-26 13:23 ` [PATCH 102/165] drm/radeon/dpm/tn: " alexdeucher
2013-06-26 13:23 ` [PATCH 103/165] drm/radeon/dpm: add new pre/post_set_power_state callbacks alexdeucher
2013-06-26 13:23 ` [PATCH 104/165] drm/radeon/dpm: add pre/post_set_power_state callbacks (6xx-eg) alexdeucher
2013-06-26 13:23 ` [PATCH 105/165] drm/radeon/dpm: add pre/post_set_power_state callback (sumo) alexdeucher
2013-06-26 13:23 ` [PATCH 106/165] drm/radeon/dpm: add pre/post_set_power_state callback (TN) alexdeucher
2013-06-26 13:23 ` [PATCH 107/165] drm/radeon/dpm: add pre/post_set_power_state callback (BTC) alexdeucher
2013-06-26 13:23 ` [PATCH 108/165] drm/radeon/dpm: add pre/post_set_power_state callback (cayman) alexdeucher
2013-06-26 13:23 ` [PATCH 109/165] drm/radeon/dpm: remove broken dyn state remnants alexdeucher
2013-06-26 13:23 ` [PATCH 110/165] drm/radeon: add missing UVD clock set in cayman dpm code alexdeucher
2013-06-26 13:23 ` [PATCH 111/165] drm/radeon/dpm: remove local sumo_get_xclk() alexdeucher
2013-06-26 21:57 ` Julian Wollrath [this message]
2013-06-26 22:51 ` [PATCH 000/165] radeon drm-next patches Julian Wollrath
2013-06-27 14:21 ` Jerome Glisse
2013-06-27 21:26 ` Julian Wollrath
2013-06-29 17:37 ` Grigori Goronzy
2013-06-26 22:23 ` Alex Deucher
2013-06-27 13:12 ` Andy Furniss
2013-06-27 14:55 ` Alex Deucher
2013-06-27 22:19 ` James Cloos
2013-06-27 22:52 ` Jerome Glisse
2013-06-27 23:55 ` Alex Deucher
2013-06-28 13:00 ` Laurent Carlier
2013-06-29 9:28 ` Andy Furniss
2013-06-29 10:23 ` Ilyes Gouta
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