From: Arnd Bergmann <arnd@arndb.de>
To: Axel Lin <axel.lin@ingics.com>
Cc: Barry Song <Baohua.Song@csr.com>,
Thomas Gleixner <tglx@linutronix.de>,
Maxime Ripard <maxime.ripard@free-electrons.com>,
linux-kernel@vger.kernel.org
Subject: Re: irqchip: sirfsoc: Question about SIRFSOC_NUM_IRQS setting
Date: Thu, 4 Jul 2013 17:29:43 +0200 [thread overview]
Message-ID: <201307041729.44045.arnd@arndb.de> (raw)
In-Reply-To: <1372948320.4838.6.camel@phoenix>
On Thursday 04 July 2013, Axel Lin wrote:
> irq_setup_generic_chip() setup max. 32 interrupts starting from gc->irq_base.
>
> sirfsoc_irq_init()
> -> sirfsoc_alloc_gc()
> -> irq_setup_generic_chip()
>
> In sirfsoc_irq_init(), current code calls
> sirfsoc_alloc_gc(base + 4, 32, SIRFSOC_NUM_IRQS - 32); //Note, SIRFSOC_NUM_IRQS is 128
>
> So I'm wondering if SIRFSOC_NUM_IRQS setting is correct or not.
I think this is a result of the sirf marco platform getting added. Note
also the comment in
/* using legacy because irqchip_generic does not work with linear */
sirfsoc_irqdomain = irq_domain_add_legacy(np, SIRFSOC_NUM_IRQS, 0, 0,
&irq_domain_simple_ops, base);
With linux-3.11 this is no longer true: the generic irqchip now does
work with the linear domain, and the code can be simplified by
using irq_alloc_domain_generic_chips(), which also gets rid
of the SIRFSOC_NUM_IRQS constant.
Arnd
prev parent reply other threads:[~2013-07-04 15:29 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-04 14:32 irqchip: sirfsoc: Question about SIRFSOC_NUM_IRQS setting Axel Lin
2013-07-04 15:29 ` Arnd Bergmann [this message]
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