From: Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
To: "Lothar Waßmann" <LW-AvR2QvxeiV7DiMYJYoSAnRvVK+yQ3ZXh@public.gmane.org>
Cc: Shawn Guo <shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Fabio Estevam
<fabio.estevam-KZfg59tc24xl57MIdRCFDg@public.gmane.org>,
linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH] i2c: mxs: fix broken timing calculation
Date: Fri, 5 Jul 2013 19:37:10 +0200 [thread overview]
Message-ID: <201307051937.10975.marex@denx.de> (raw)
In-Reply-To: <20951.550.818976.677404-VjFSrY7JcPWvSplVBqRQBQ@public.gmane.org>
Dear Lothar Waßmann,
> Hi,
>
> Marek Vasut writes:
> > Hi Lothar,
> >
> > > The timing calculation is rather bogus and gives extremely wrong
> > > results for higher frequencies (on an i.MX28). E.g. instead of 400 kHz
> > > I measured 770 kHz.
> > >
> > > Implement a calculation that adheres to the I2C spec and gives exact
> > > results for I2C frequencies from 12.56 kHz to 960 kHz.
> > >
> > > Also the bus_free and leadin parameters are programmed according to
> > > the I2C spec for standard and fast mode.
> >
> > I suspect the resulting speed is heavily dependent on hardware properties
> > of the bus. Did you have a chance to check it with a scope? I will try
> > to recheck on other boards next week.
>
> Of course I did! I found the DS1339 RTC not working on our hardware
> with the I2C clock frequency set to 400kHz and then checked the bus
> timing. I found the SCL frequency to be 770kHz instead of 400kHz and
> 113kHz instead of 100kHz.
> On what hardware did you do your measurements?
MX28EVK and M28EVK.
> The fancy constants -2 and -7 in the calculation were derived from
> measuring the clock low and high time with low_count and high_count
> set to 1 and measuring the actual timing of the signal.
> The clock frequeny in this setup is 2.18 MHz corresponding to 11 clock
> cycles of the 24MHz clock. The LOW time was about 140ns and the HIGH
> time 318ns corresponding to 3 and 8 (instead of 1) clock cycles.
>
> These constants could be different for different SoCs (i.MX23).
> But I don't have any hardware to verify that.
I can check it for you on MX23 next week, I have two boards with that chip with
well accessible I2C. I am not in the office now, so this will have to wait until
next week.
btw offtopic, I will at least try to fix the PIO in the meantime.
> Maybe some guru from Freescale can comment on this and perhaps
> document the relationship between the register contents and the actual
> timing.
Ok, you're taking a third stab at getting FSL to explain how to configure
arbitrary clock speeds on the MXS I2C. Good luck ;-D
Best regards,
Marek Vasut
next prev parent reply other threads:[~2013-07-05 17:37 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-05 16:28 [PATCH] i2c: mxs: fix broken timing calculation Lothar Waßmann
[not found] ` <1373041680-26939-1-git-send-email-LW-bxm8fMRDkQLDiMYJYoSAnRvVK+yQ3ZXh@public.gmane.org>
2013-07-05 16:53 ` Marek Vasut
[not found] ` <201307051853.45786.marex-ynQEQJNshbs@public.gmane.org>
2013-07-05 17:28 ` Lothar Waßmann
[not found] ` <20951.550.818976.677404-VjFSrY7JcPWvSplVBqRQBQ@public.gmane.org>
2013-07-05 17:37 ` Marek Vasut [this message]
[not found] ` <201307051937.10975.marex-ynQEQJNshbs@public.gmane.org>
2013-07-15 10:22 ` Lothar Waßmann
[not found] ` <20963.52588.898163.953695-VjFSrY7JcPWvSplVBqRQBQ@public.gmane.org>
2013-07-15 12:24 ` Marek Vasut
[not found] ` <201307151424.32248.marex-ynQEQJNshbs@public.gmane.org>
2013-07-16 8:10 ` Lothar Waßmann
[not found] ` <20965.3.293494.346855-VjFSrY7JcPWvSplVBqRQBQ@public.gmane.org>
2013-07-17 17:54 ` Marek Vasut
[not found] ` <201307171954.59556.marex-ynQEQJNshbs@public.gmane.org>
2013-07-18 11:18 ` Lothar Waßmann
[not found] ` <20967.53016.902909.282346-VjFSrY7JcPWvSplVBqRQBQ@public.gmane.org>
2013-08-15 10:12 ` Wolfram Sang
2013-08-15 10:13 ` Wolfram Sang
2013-08-15 21:30 ` Marek Vasut
2013-08-16 16:10 ` Wolfram Sang
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