From mboxrd@z Thu Jan 1 00:00:00 1970 From: heiko@sntech.de (Heiko =?utf-8?q?St=C3=BCbner?=) Date: Sat, 6 Jul 2013 00:58:51 +0200 Subject: [PATCH 5/9] clocksource: dw_apb_timer: quirk for variants without EOI register In-Reply-To: <201307060054.07784.heiko@sntech.de> References: <201307060051.09716.heiko@sntech.de> <201307060054.07784.heiko@sntech.de> Message-ID: <201307060058.52177.heiko@sntech.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org this patch should have had a From: Ulrich Prinz sorry for the mistake Am Samstag, 6. Juli 2013, 00:54:07 schrieb Heiko St?bner: > Some variants of the dw_apb_timer don't have an eoi register but instead > expect a one to be written to the int_status register at eoi time. > > Signed-off-by: Ulrich Prinz > --- > drivers/clocksource/dw_apb_timer.c | 10 +++++++++- > include/linux/dw_apb_timer.h | 5 +++++ > 2 files changed, 14 insertions(+), 1 deletion(-) > > diff --git a/drivers/clocksource/dw_apb_timer.c > b/drivers/clocksource/dw_apb_timer.c index 5f80a30..23cd7c6 100644 > --- a/drivers/clocksource/dw_apb_timer.c > +++ b/drivers/clocksource/dw_apb_timer.c > @@ -104,6 +104,11 @@ static void apbt_eoi(struct dw_apb_timer *timer) > apbt_readl(timer, timer->reg_eoi); > } > > +static void apbt_eoi_int_status(struct dw_apb_timer *timer) > +{ > + apbt_writel(timer, 1, timer->reg_int_status); > +} > + > static irqreturn_t dw_apb_clockevent_irq(int irq, void *data) > { > struct clock_event_device *evt = data; > @@ -286,7 +291,10 @@ dw_apb_clockevent_init(int cpu, const char *name, > unsigned rating, IRQF_NOBALANCING | > IRQF_DISABLED; > > - dw_ced->eoi = apbt_eoi; > + if (quirks & APBTMR_QUIRK_NO_EOI) > + dw_ced->eoi = apbt_eoi_int_status; > + else > + dw_ced->eoi = apbt_eoi; > err = setup_irq(irq, &dw_ced->irqaction); > if (err) { > pr_err("failed to request timer irq\n"); > diff --git a/include/linux/dw_apb_timer.h b/include/linux/dw_apb_timer.h > index 80f6686..fbe4c6b 100644 > --- a/include/linux/dw_apb_timer.h > +++ b/include/linux/dw_apb_timer.h > @@ -25,6 +25,11 @@ > */ > #define APBTMR_QUIRK_64BIT_COUNTER BIT(0) > > +/* The IP does not provide a end-of-interrupt register to clear pending > + * interrupts, but requires to write a 1 to the interrupt-status register. > + */ > +#define APBTMR_QUIRK_NO_EOI BIT(1) > + > struct dw_apb_timer { > void __iomem *base; > unsigned long freq; From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiko =?utf-8?q?St=C3=BCbner?= Subject: Re: [PATCH 5/9] clocksource: dw_apb_timer: quirk for variants without EOI register Date: Sat, 6 Jul 2013 00:58:51 +0200 Message-ID: <201307060058.52177.heiko@sntech.de> References: <201307060051.09716.heiko@sntech.de> <201307060054.07784.heiko@sntech.de> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <201307060054.07784.heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org Sender: "devicetree-discuss" To: John Stultz Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Rob Herring , Grant Likely , Jamie Iles , Thomas Gleixner , Ulrich Prinz , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: devicetree@vger.kernel.org dGhpcyBwYXRjaCBzaG91bGQgaGF2ZSBoYWQgYQoKRnJvbTogVWxyaWNoIFByaW56IDx1bHJpY2gu cHJpbnpAZ29vZ2xlbWFpbC5jb20+Cgpzb3JyeSBmb3IgdGhlIG1pc3Rha2UKCkFtIFNhbXN0YWcs IDYuIEp1bGkgMjAxMywgMDA6NTQ6MDcgc2NocmllYiBIZWlrbyBTdMO8Ym5lcjoKPiBTb21lIHZh cmlhbnRzIG9mIHRoZSBkd19hcGJfdGltZXIgZG9uJ3QgaGF2ZSBhbiBlb2kgcmVnaXN0ZXIgYnV0 IGluc3RlYWQKPiBleHBlY3QgYSBvbmUgdG8gYmUgd3JpdHRlbiB0byB0aGUgaW50X3N0YXR1cyBy ZWdpc3RlciBhdCBlb2kgdGltZS4KPiAKPiBTaWduZWQtb2ZmLWJ5OiBVbHJpY2ggUHJpbnogPHVs cmljaC5wcmluekBnb29nbGVtYWlsLmNvbT4KPiAtLS0KPiAgZHJpdmVycy9jbG9ja3NvdXJjZS9k d19hcGJfdGltZXIuYyB8ICAgMTAgKysrKysrKysrLQo+ICBpbmNsdWRlL2xpbnV4L2R3X2FwYl90 aW1lci5oICAgICAgIHwgICAgNSArKysrKwo+ICAyIGZpbGVzIGNoYW5nZWQsIDE0IGluc2VydGlv bnMoKyksIDEgZGVsZXRpb24oLSkKPiAKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbG9ja3NvdXJj ZS9kd19hcGJfdGltZXIuYwo+IGIvZHJpdmVycy9jbG9ja3NvdXJjZS9kd19hcGJfdGltZXIuYyBp bmRleCA1ZjgwYTMwLi4yM2NkN2M2IDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvY2xvY2tzb3VyY2Uv ZHdfYXBiX3RpbWVyLmMKPiArKysgYi9kcml2ZXJzL2Nsb2Nrc291cmNlL2R3X2FwYl90aW1lci5j Cj4gQEAgLTEwNCw2ICsxMDQsMTEgQEAgc3RhdGljIHZvaWQgYXBidF9lb2koc3RydWN0IGR3X2Fw Yl90aW1lciAqdGltZXIpCj4gIAlhcGJ0X3JlYWRsKHRpbWVyLCB0aW1lci0+cmVnX2VvaSk7Cj4g IH0KPiAKPiArc3RhdGljIHZvaWQgYXBidF9lb2lfaW50X3N0YXR1cyhzdHJ1Y3QgZHdfYXBiX3Rp bWVyICp0aW1lcikKPiArewo+ICsJYXBidF93cml0ZWwodGltZXIsIDEsIHRpbWVyLT5yZWdfaW50 X3N0YXR1cyk7Cj4gK30KPiArCj4gIHN0YXRpYyBpcnFyZXR1cm5fdCBkd19hcGJfY2xvY2tldmVu dF9pcnEoaW50IGlycSwgdm9pZCAqZGF0YSkKPiAgewo+ICAJc3RydWN0IGNsb2NrX2V2ZW50X2Rl dmljZSAqZXZ0ID0gZGF0YTsKPiBAQCAtMjg2LDcgKzI5MSwxMCBAQCBkd19hcGJfY2xvY2tldmVu dF9pbml0KGludCBjcHUsIGNvbnN0IGNoYXIgKm5hbWUsCj4gdW5zaWduZWQgcmF0aW5nLCBJUlFG X05PQkFMQU5DSU5HIHwKPiAgCQkJCQkgIElSUUZfRElTQUJMRUQ7Cj4gCj4gLQlkd19jZWQtPmVv aSA9IGFwYnRfZW9pOwo+ICsJaWYgKHF1aXJrcyAmIEFQQlRNUl9RVUlSS19OT19FT0kpCj4gKwkJ ZHdfY2VkLT5lb2kgPSBhcGJ0X2VvaV9pbnRfc3RhdHVzOwo+ICsJZWxzZQo+ICsJCWR3X2NlZC0+ ZW9pID0gYXBidF9lb2k7Cj4gIAllcnIgPSBzZXR1cF9pcnEoaXJxLCAmZHdfY2VkLT5pcnFhY3Rp b24pOwo+ICAJaWYgKGVycikgewo+ICAJCXByX2VycigiZmFpbGVkIHRvIHJlcXVlc3QgdGltZXIg aXJxXG4iKTsKPiBkaWZmIC0tZ2l0IGEvaW5jbHVkZS9saW51eC9kd19hcGJfdGltZXIuaCBiL2lu Y2x1ZGUvbGludXgvZHdfYXBiX3RpbWVyLmgKPiBpbmRleCA4MGY2Njg2Li5mYmU0YzZiIDEwMDY0 NAo+IC0tLSBhL2luY2x1ZGUvbGludXgvZHdfYXBiX3RpbWVyLmgKPiArKysgYi9pbmNsdWRlL2xp bnV4L2R3X2FwYl90aW1lci5oCj4gQEAgLTI1LDYgKzI1LDExIEBACj4gICAqLwo+ICAjZGVmaW5l IEFQQlRNUl9RVUlSS182NEJJVF9DT1VOVEVSCUJJVCgwKQo+IAo+ICsvKiBUaGUgSVAgZG9lcyBu b3QgcHJvdmlkZSBhIGVuZC1vZi1pbnRlcnJ1cHQgcmVnaXN0ZXIgdG8gY2xlYXIgcGVuZGluZwo+ ICsgKiBpbnRlcnJ1cHRzLCBidXQgcmVxdWlyZXMgdG8gd3JpdGUgYSAxIHRvIHRoZSBpbnRlcnJ1 cHQtc3RhdHVzIHJlZ2lzdGVyLgo+ICsgKi8KPiArI2RlZmluZSBBUEJUTVJfUVVJUktfTk9fRU9J CQlCSVQoMSkKPiArCj4gIHN0cnVjdCBkd19hcGJfdGltZXIgewo+ICAJdm9pZCBfX2lvbWVtCQkJ CSpiYXNlOwo+ICAJdW5zaWduZWQgbG9uZwkJCQlmcmVxOwoKX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX18KZGV2aWNldHJlZS1kaXNjdXNzIG1haWxpbmcgbGlz dApkZXZpY2V0cmVlLWRpc2N1c3NAbGlzdHMub3psYWJzLm9yZwpodHRwczovL2xpc3RzLm96bGFi cy5vcmcvbGlzdGluZm8vZGV2aWNldHJlZS1kaXNjdXNzCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752574Ab3GEW7E (ORCPT ); Fri, 5 Jul 2013 18:59:04 -0400 Received: from gloria.sntech.de ([95.129.55.99]:38186 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752415Ab3GEW7C (ORCPT ); Fri, 5 Jul 2013 18:59:02 -0400 From: Heiko =?utf-8?q?St=C3=BCbner?= To: John Stultz Subject: Re: [PATCH 5/9] clocksource: dw_apb_timer: quirk for variants without EOI register Date: Sat, 6 Jul 2013 00:58:51 +0200 User-Agent: KMail/1.13.7 (Linux/3.2.0-3-686-pae; KDE/4.8.4; i686; ; ) Cc: Thomas Gleixner , Jamie Iles , Dinh Nguyen , Grant Likely , linux-arm-kernel@lists.infradead.org, Rob Herring , devicetree-discuss@lists.ozlabs.org, linux-kernel@vger.kernel.org, Arnd Bergmann , Olof Johansson , Ulrich Prinz References: <201307060051.09716.heiko@sntech.de> <201307060054.07784.heiko@sntech.de> In-Reply-To: <201307060054.07784.heiko@sntech.de> MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <201307060058.52177.heiko@sntech.de> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org this patch should have had a From: Ulrich Prinz sorry for the mistake Am Samstag, 6. Juli 2013, 00:54:07 schrieb Heiko Stübner: > Some variants of the dw_apb_timer don't have an eoi register but instead > expect a one to be written to the int_status register at eoi time. > > Signed-off-by: Ulrich Prinz > --- > drivers/clocksource/dw_apb_timer.c | 10 +++++++++- > include/linux/dw_apb_timer.h | 5 +++++ > 2 files changed, 14 insertions(+), 1 deletion(-) > > diff --git a/drivers/clocksource/dw_apb_timer.c > b/drivers/clocksource/dw_apb_timer.c index 5f80a30..23cd7c6 100644 > --- a/drivers/clocksource/dw_apb_timer.c > +++ b/drivers/clocksource/dw_apb_timer.c > @@ -104,6 +104,11 @@ static void apbt_eoi(struct dw_apb_timer *timer) > apbt_readl(timer, timer->reg_eoi); > } > > +static void apbt_eoi_int_status(struct dw_apb_timer *timer) > +{ > + apbt_writel(timer, 1, timer->reg_int_status); > +} > + > static irqreturn_t dw_apb_clockevent_irq(int irq, void *data) > { > struct clock_event_device *evt = data; > @@ -286,7 +291,10 @@ dw_apb_clockevent_init(int cpu, const char *name, > unsigned rating, IRQF_NOBALANCING | > IRQF_DISABLED; > > - dw_ced->eoi = apbt_eoi; > + if (quirks & APBTMR_QUIRK_NO_EOI) > + dw_ced->eoi = apbt_eoi_int_status; > + else > + dw_ced->eoi = apbt_eoi; > err = setup_irq(irq, &dw_ced->irqaction); > if (err) { > pr_err("failed to request timer irq\n"); > diff --git a/include/linux/dw_apb_timer.h b/include/linux/dw_apb_timer.h > index 80f6686..fbe4c6b 100644 > --- a/include/linux/dw_apb_timer.h > +++ b/include/linux/dw_apb_timer.h > @@ -25,6 +25,11 @@ > */ > #define APBTMR_QUIRK_64BIT_COUNTER BIT(0) > > +/* The IP does not provide a end-of-interrupt register to clear pending > + * interrupts, but requires to write a 1 to the interrupt-status register. > + */ > +#define APBTMR_QUIRK_NO_EOI BIT(1) > + > struct dw_apb_timer { > void __iomem *base; > unsigned long freq;