Re: [PATCH 1/4] input: ti_am335x_tsc: correct step mask update after IRQ

["Zubair Lutfullah :" <zubair.lutfullah@gmail.com>]

On Fri, Aug 16, 2013 at 10:53:50AM +0200, Sebastian Andrzej Siewior wrote:
> * Zubair Lutfullah | 2013-08-13 17:48:16 [+0100]:
> 
> >@@ -316,7 +318,7 @@ static irqreturn_t titsc_irq(int irq, void *dev)
> > 
> > 	if (irqclr) {
> > 		titsc_writel(ts_dev, REG_IRQSTATUS, irqclr);
> >-		am335x_tsc_se_update(ts_dev->mfd_tscadc);
> >+		am335x_tsc_se_set(ts_dev->mfd_tscadc, ts_dev->step_mask);
> > 		return IRQ_HANDLED;
> > 	}
> > 	return IRQ_NONE;
> 
> titsc_step_config() computes the mask once since it does not change. It
> is then assigned via am335x_tsc_se_set() to ->reg_se_cache() and later
> always udpated via am335x_tsc_se_update(). This should ensure that ADC's
> and TSC's bits are in sync and clear each other out.
> Now you call am335x_tsc_se_set() in every irq which adds the TSC's mask
> to ->reg_se_cache but why? It was never removed.
> 
> Sebastian

The problem is when ADC/TSC are used together.

reg_se_cache would get updated with masks in the se_set function in MFD core.

>From TSC driver, the TSC steps would be set in the reg_se_cache variable.
>From ADC driver, the ADC steps would be set in the reg_se_cache variable.

But the ADC masks weren't being cleared from the reg_se_cache variable
anywhere.

After a while of using ADC/TSC together, the reg_se_cache 
variable would have FFFF always. Resulting in redundant sampling 
and data in ADC FIFO0.

MFD has received fixes to update the reg_se_cache upon 
every call to the se_set functions.

Thus, the step_mask must be set every time to ensure
that it is updated correctly every time.

Hope that clears the confusion.
This TSC/ADC sharing can be pretty confusing.

Thanks
Zubair