Re: VIA chipset with Root Port under a bridge

[Shaohua Li <shli@kernel.org>]

On Thu, Aug 22, 2013 at 03:49:24PM -0600, Bjorn Helgaas wrote:
> [replace Shaohua's dead Intel address with @kernel.org address; please
> reply to this, not the original]
> 
> On Thu, Aug 22, 2013 at 3:47 PM, Bjorn Helgaas <bhelgaas@google.com> wrote:
> > Shaohua, your commit 8e822df700 references a VIA chipset with a Root
> > Port under a bridge, and that commit adds a special case to disable
> > ASPM for that situation.
> >
> > I know this is pretty old (the commit is from 2009), but do you have
> > any more details about that system?  A pointer to the original problem
> > report, lspci output, dmesg output, etc.?
> >
> > I'm concerned because other parts of PCI make assumptions about Root
> > Port topology, e.g., in MPS configuration, and we might need to make
> > similar changes elsewhere.

I tried to search this in my mail archive, but no success, sorry. Suppose
Wolfgang reported it, but I can't remember any more details. Maybe check VIA
datasheet?

Thanks,
Shaohua