From: vinod.koul@intel.com (Vinod Koul)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] dmaengine: sirf: add dmaengine_prep_slave_single/sg support
Date: Mon, 26 Aug 2013 14:26:07 +0530 [thread overview]
Message-ID: <20130826085607.GN2748@intel.com> (raw)
In-Reply-To: <1377435433-23202-1-git-send-email-Baohua.Song@csr.com>
On Sun, Aug 25, 2013 at 08:57:13PM +0800, Barry Song wrote:
> the dma engine of sirfsoc supports interleaved mode, but if we set
> xlen=width instead xlen<width, it will work as non-interleaved. as
> most clients of sirf dma driver still don't need interleaved mode,
> so here we still need to implement prep_slave_sg entry so that users
> like uart, spi can use these APIs instead of interleaved API.
Well in that case why dont you just create a wrapper on top of interleaved API
to make this work without driver changes
> the dma engine of sirfsoc doesn't support hardware s/g, so here we
> are using the list of desc nodes to do SW s/g. when dma operations
> finish, driver will re-start the next desc automatically.
>
> Signed-off-by: Barry Song <Baohua.Song@csr.com>
> ---
> drivers/dma/sirf-dma.c | 57 ++++++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 57 insertions(+)
>
> diff --git a/drivers/dma/sirf-dma.c b/drivers/dma/sirf-dma.c
> index 6aec3ad..c226c79 100644
> --- a/drivers/dma/sirf-dma.c
> +++ b/drivers/dma/sirf-dma.c
> @@ -577,6 +577,62 @@ err_dir:
> }
>
> static struct dma_async_tx_descriptor *
> +sirfsoc_dma_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
> + unsigned int sg_len, enum dma_transfer_direction direction,
> + unsigned long flags, void *context)
> +{
> + struct sirfsoc_dma_chan *schan = dma_chan_to_sirfsoc_dma_chan(chan);
> + struct sirfsoc_dma_desc *first_sdesc;
> + struct sirfsoc_dma_desc *sdesc;
> + struct list_head *l;
> + unsigned long iflags;
> + struct scatterlist *sg;
> + int desc_cnt = 0;
> + int i;
> + int ret;
> +
> + /*
> + * the hardware doesn't support sg, here we use software list
> + * to simulate sg, so make sure we have enough desc nodes
> + */
> + spin_lock_irqsave(&schan->lock, iflags);
> + list_for_each(l, &schan->free)
> + desc_cnt++;
why dont you allocate descriptors here. That will remove this limitation..
~Vinod
next prev parent reply other threads:[~2013-08-26 8:56 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-25 12:57 [PATCH] dmaengine: sirf: add dmaengine_prep_slave_single/sg support Barry Song
2013-08-26 8:56 ` Vinod Koul [this message]
2013-09-01 13:02 ` Barry Song
2013-09-02 6:25 ` Vinod Koul
2013-09-03 10:06 ` Barry Song
2013-09-03 11:39 ` Vinod Koul
2013-09-03 12:42 ` Barry Song
2013-09-03 12:12 ` Vinod Koul
2013-09-03 11:55 ` Jassi Brar
2013-09-03 12:08 ` Vinod Koul
2013-09-03 13:15 ` Jassi Brar
2013-09-03 12:38 ` Barry Song
2013-09-03 12:54 ` Jassi Brar
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