From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: intel-gfx@lists.freedesktop.org, yogesh.mohan.marimuthu@intel.com
Subject: Re: [PATCH v3 00/15] drm/i915: Baytrail MIPI DSI support
Date: Tue, 27 Aug 2013 19:23:47 +0300 [thread overview]
Message-ID: <20130827162347.GB11428@intel.com> (raw)
In-Reply-To: <cover.1377604770.git.jani.nikula@intel.com>
On Tue, Aug 27, 2013 at 03:12:12PM +0300, Jani Nikula wrote:
> Hi all, v3 of [1] addressing (most of) Ville's review comments.
>
> I am not reposting patch 1/15 to dri-devel, as it's unchanged since [2].
Didn't really look at the AUO and VBT patches (15 and 13) since I have
no specs for those. I commented earlier on the band gap patch (12) earlier,
but since no one really knows anything more about it, I can't really review
it properly. Patch 9 had a small typo which I pointed out.
For rest (patches 1-8, 10-11, 14):
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> BR,
> Jani.
>
> [1] http://mid.gmane.org/cover.1376655793.git.jani.nikula@intel.com
> [2] http://mid.gmane.org/1377000330-2904-1-git-send-email-jani.nikula@intel.com
>
> Jani Nikula (10):
> drm/i915: add more VLV IOSF sideband ports accessors
> drm/i915: add VLV pipeconf bit definition for DSI PLL lock
> drm/i915: add MIPI DSI register definitions
> drm/i915: add MIPI DSI output type and subtypes
> drm/i915: add structs for MIPI DSI output
> drm/i915: add MIPI DSI command sending routines
> drm/i915: add basic MIPI DSI output support
> drm/i915: fix PLL assertions for DSI PLL
> drm/i915: don't enable DPLL for DSI
> drm/i915: initialize DSI output on VLV
>
> Shobhit Kumar (4):
> drm: add MIPI DSI encoder and connector types
> drm/i915: Band Gap WA
> drm/i915: Parse the MIPI related VBT Block and store relevant info
> drm/i915: add AUO MIPI DSI display sub-encoder
>
> ymohanma (1):
> drm/i915: add VLV DSI PLL Calculations
>
> drivers/gpu/drm/drm_crtc.c | 2 +
> drivers/gpu/drm/i915/Makefile | 4 +
> drivers/gpu/drm/i915/auo_dsi_display.c | 182 ++++++++++
> drivers/gpu/drm/i915/i915_drv.h | 13 +
> drivers/gpu/drm/i915/i915_reg.h | 447 +++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_bios.c | 16 +
> drivers/gpu/drm/i915/intel_bios.h | 41 +++
> drivers/gpu/drm/i915/intel_display.c | 96 +++--
> drivers/gpu/drm/i915/intel_drv.h | 7 +-
> drivers/gpu/drm/i915/intel_dsi.c | 626 ++++++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_dsi.h | 105 ++++++
> drivers/gpu/drm/i915/intel_dsi_cmd.c | 427 ++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_dsi_cmd.h | 109 ++++++
> drivers/gpu/drm/i915/intel_dsi_pll.c | 317 ++++++++++++++++
> drivers/gpu/drm/i915/intel_sideband.c | 56 +++
> include/uapi/drm/drm_mode.h | 2 +
> 16 files changed, 2421 insertions(+), 29 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/auo_dsi_display.c
> create mode 100644 drivers/gpu/drm/i915/intel_dsi.c
> create mode 100644 drivers/gpu/drm/i915/intel_dsi.h
> create mode 100644 drivers/gpu/drm/i915/intel_dsi_cmd.c
> create mode 100644 drivers/gpu/drm/i915/intel_dsi_cmd.h
> create mode 100644 drivers/gpu/drm/i915/intel_dsi_pll.c
>
> --
> 1.7.9.5
--
Ville Syrjälä
Intel OTC
prev parent reply other threads:[~2013-08-27 16:23 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-27 12:12 [PATCH v3 00/15] drm/i915: Baytrail MIPI DSI support Jani Nikula
2013-08-27 12:12 ` [PATCH v3 01/15] drm: add MIPI DSI encoder and connector types Jani Nikula
2013-08-27 12:12 ` [PATCH v3 02/15] drm/i915: add more VLV IOSF sideband ports accessors Jani Nikula
2013-08-27 12:12 ` [PATCH v3 03/15] drm/i915: add VLV pipeconf bit definition for DSI PLL lock Jani Nikula
2013-08-27 12:12 ` [PATCH v3 04/15] drm/i915: add MIPI DSI register definitions Jani Nikula
2013-08-27 12:12 ` [PATCH v3 05/15] drm/i915: add MIPI DSI output type and subtypes Jani Nikula
2013-08-27 12:12 ` [PATCH v3 06/15] drm/i915: add structs for MIPI DSI output Jani Nikula
2013-08-27 12:12 ` [PATCH v3 07/15] drm/i915: add MIPI DSI command sending routines Jani Nikula
2013-08-27 12:12 ` [PATCH v3 08/15] drm/i915: add basic MIPI DSI output support Jani Nikula
2013-08-27 12:12 ` [PATCH v3 09/15] drm/i915: add VLV DSI PLL Calculations Jani Nikula
2013-08-27 16:13 ` Ville Syrjälä
[not found] ` <343cca9b221247abf8e5d044c3b69f839ff13e54.1377635967.git.jani.nikula@intel.com>
2013-08-27 20:40 ` [PATCH " Jani Nikula
2013-08-27 20:51 ` [PATCH v3 " Jani Nikula
2013-08-27 12:12 ` [PATCH v3 10/15] drm/i915: fix PLL assertions for DSI PLL Jani Nikula
2013-08-27 12:12 ` [PATCH v3 11/15] drm/i915: don't enable DPLL for DSI Jani Nikula
2013-08-27 12:12 ` [PATCH v3 12/15] drm/i915: Band Gap WA Jani Nikula
2013-08-29 9:48 ` Damien Lespiau
2013-08-27 12:12 ` [PATCH v3 13/15] drm/i915: Parse the MIPI related VBT Block and store relevant info Jani Nikula
2013-08-27 12:12 ` [PATCH v3 14/15] drm/i915: initialize DSI output on VLV Jani Nikula
2013-08-27 12:12 ` [PATCH v3 15/15] drm/i915: add AUO MIPI DSI display sub-encoder Jani Nikula
2013-08-27 16:23 ` Ville Syrjälä [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20130827162347.GB11428@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jani.nikula@intel.com \
--cc=yogesh.mohan.marimuthu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.