From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38016) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VEmwr-0005Gx-5K for qemu-devel@nongnu.org; Wed, 28 Aug 2013 17:06:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VEmwp-0007kV-TN for qemu-devel@nongnu.org; Wed, 28 Aug 2013 17:06:41 -0400 Received: from hall.aurel32.net ([2001:470:1f0b:4a8::1]:35153) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VEmwp-0007kJ-M8 for qemu-devel@nongnu.org; Wed, 28 Aug 2013 17:06:39 -0400 Date: Wed, 28 Aug 2013 23:06:37 +0200 From: Aurelien Jarno Message-ID: <20130828210637.GG5908@ohm.aurel32.net> References: <1377190729-14008-1-git-send-email-rth@twiddle.net> <1377190729-14008-4-git-send-email-rth@twiddle.net> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1377190729-14008-4-git-send-email-rth@twiddle.net> Subject: Re: [Qemu-devel] [PATCH 03/18] tcg: Change tcg_qemu_tb_exec return to uintptr_t List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: qemu-devel@nongnu.org On Thu, Aug 22, 2013 at 09:58:34AM -0700, Richard Henderson wrote: > Signed-off-by: Richard Henderson > --- > cpu-exec.c | 2 +- > tcg/ppc/tcg-target.h | 2 +- > tcg/tcg.h | 3 +-- > tcg/tci/tcg-target.h | 2 +- > tci.c | 4 ++-- > 5 files changed, 6 insertions(+), 7 deletions(-) > > diff --git a/cpu-exec.c b/cpu-exec.c > index 301be28..14af2ed 100644 > --- a/cpu-exec.c > +++ b/cpu-exec.c > @@ -53,7 +53,7 @@ void cpu_resume_from_signal(CPUArchState *env, void *puc) > static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr) > { > CPUArchState *env = cpu->env_ptr; > - tcg_target_ulong next_tb = tcg_qemu_tb_exec(env, tb_ptr); > + uintptr_t next_tb = tcg_qemu_tb_exec(env, tb_ptr); > if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) { > /* We didn't start executing this TB (eg because the instruction > * counter hit zero); we must restore the guest PC to the address > diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h > index b42d97c..6406977 100644 > --- a/tcg/ppc/tcg-target.h > +++ b/tcg/ppc/tcg-target.h > @@ -100,7 +100,7 @@ typedef enum { > #define TCG_AREG0 TCG_REG_R27 > > #define tcg_qemu_tb_exec(env, tb_ptr) \ > - ((long __attribute__ ((longcall)) \ > + ((uintptr_t __attribute__ ((longcall)) \ > (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, tb_ptr) > > #endif > diff --git a/tcg/tcg.h b/tcg/tcg.h > index f3f9889..bfe420a 100644 > --- a/tcg/tcg.h > +++ b/tcg/tcg.h > @@ -731,8 +731,7 @@ TCGv_i64 tcg_const_local_i64(int64_t val); > > #if !defined(tcg_qemu_tb_exec) > # define tcg_qemu_tb_exec(env, tb_ptr) \ > - ((tcg_target_ulong (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, \ > - tb_ptr) > + ((uintptr_t (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, tb_ptr) > #endif > > void tcg_register_jit(void *buf, size_t buf_size); > diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h > index c80a34f..18f57a2 100644 > --- a/tcg/tci/tcg-target.h > +++ b/tcg/tci/tcg-target.h > @@ -166,7 +166,7 @@ typedef enum { > > void tci_disas(uint8_t opc); > > -tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr); > +uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr); > #define tcg_qemu_tb_exec tcg_qemu_tb_exec > > static inline void flush_icache_range(uintptr_t start, uintptr_t stop) > diff --git a/tci.c b/tci.c > index c742c8d..18c888e 100644 > --- a/tci.c > +++ b/tci.c > @@ -434,11 +434,11 @@ static bool tci_compare64(uint64_t u0, uint64_t u1, TCGCond condition) > } > > /* Interpret pseudo code in tb. */ > -tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr) > +uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr) > { > long tcg_temps[CPU_TEMP_BUF_NLONGS]; > uintptr_t sp_value = (uintptr_t)(tcg_temps + CPU_TEMP_BUF_NLONGS); > - tcg_target_ulong next_tb = 0; > + uintptr_t next_tb = 0; > > tci_reg[TCG_AREG0] = (tcg_target_ulong)env; > tci_reg[TCG_REG_CALL_STACK] = sp_value; Reviewed-by: Aurelien Jarno -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net