From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH v2] drm/i915/hsw: Add display Audio codec disable sequence for Haswell Date: Thu, 5 Sep 2013 14:33:20 +0300 Message-ID: <20130905113320.GY11428@intel.com> References: <1377820220-8251-1-git-send-email-mengdong.lin@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id B87C0E5D47 for ; Thu, 5 Sep 2013 04:33:25 -0700 (PDT) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: intel-gfx , Mukesh List-Id: intel-gfx@lists.freedesktop.org On Wed, Sep 04, 2013 at 08:50:13PM +0200, Daniel Vetter wrote: > On Fri, Aug 30, 2013 at 1:50 AM, wrote: > > + /* Wait for 2 vertical blanks */ > > + intel_wait_for_vblank(dev, pipe); > > + intel_wait_for_vblank(dev, pipe); > > + > > + /* Disable audio PD. This is optional as per Bspec. */ > > + temp =3D I915_READ(HSW_AUD_PIN_ELD_CP_VLD); > > + temp &=3D ~(AUDIO_OUTPUT_ENABLE_A << (pipe * 4)); > > + I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, temp); > = > If this is optional do we really need the two vblank waits above? > Adding them just for fun when we generally try to rip out as many > vblank waits as possible from the modeset code isn't all that great > ... One idea I had for these kinds of vblank waits (there also one required for IPS for instance) is that we might just sample a vblank counter after the first step, then at the latest point we can, we'd wait for the frame counter to have passed the sampled vaoue + whatever extra is needed. That might allow us to do other stuff in parallel while the required number of vblanks will elapese. -- = Ville Syrj=E4l=E4 Intel OTC