From: Andi Kleen <andi@firstfloor.org>
To: Ingo Molnar <mingo@kernel.org>
Cc: Andi Kleen <andi@firstfloor.org>,
peterz@infradead.org, linux-kernel@vger.kernel.org,
acme@infradead.org, jolsa@redhat.com, eranian@google.com
Subject: Re: perf, x86: Add parts of the remaining haswell PMU functionality
Date: Thu, 5 Sep 2013 17:10:35 +0200 [thread overview]
Message-ID: <20130905151034.GP19750@two.firstfloor.org> (raw)
In-Reply-To: <20130905131502.GA26387@gmail.com>
On Thu, Sep 05, 2013 at 03:15:02PM +0200, Ingo Molnar wrote:
>
> * Ingo Molnar <mingo@kernel.org> wrote:
>
> > One thing I'm not seeing in the current Haswell code is the config set
> > up for PERF_COUNT_HW_STALLED_CYCLES_FRONTEND/BACKEND. Both SB and IB has
> > them configured.
>
> Ping? Consider this a regression report.
AFAIK they don't work. You only get the correct answer
in some situations, but in others it either overestimates
frontend or underestimates backend badly.
The correct way is to implement it like TopDown level 1,
but I don't know how to put that into the kernel.
http://software.intel.com/en-us/articles/how-to-tune-applications-using-a-top-down-characterization-of-microarchitectural-issues
It requires running 4 counters and computing some equations.
My toplev tool in http://github.com/andikleen/pmu-tools
has a implementation on top of perf.
I could put it into perf stat if you want, but it would
be somewhat Intel specific.
-Andi
--
ak@linux.intel.com -- Speaking for myself only.
next prev parent reply other threads:[~2013-09-05 15:10 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-09 1:15 perf, x86: Add parts of the remaining haswell PMU functionality Andi Kleen
2013-08-09 1:15 ` [PATCH 1/4] perf, x86: Avoid checkpointed counters causing excessive TSX aborts v4 Andi Kleen
2013-08-13 10:29 ` Peter Zijlstra
2013-08-09 1:15 ` [PATCH 2/4] perf, x86: Report TSX transaction abort cost as weight Andi Kleen
2013-08-13 11:23 ` Peter Zijlstra
2013-08-13 14:35 ` Andi Kleen
2013-08-13 15:27 ` Peter Zijlstra
2013-08-13 18:25 ` Andi Kleen
2013-08-14 9:33 ` Peter Zijlstra
2013-08-09 1:15 ` [PATCH 3/4] perf, x86: Add Haswell TSX event aliases v6 Andi Kleen
2013-08-09 1:15 ` [PATCH 4/4] perf, tools: Add perf stat --transaction v3 Andi Kleen
2013-09-02 6:55 ` perf, x86: Add parts of the remaining haswell PMU functionality Ingo Molnar
2013-09-05 13:15 ` Ingo Molnar
2013-09-05 15:10 ` Andi Kleen [this message]
2013-09-05 17:04 ` Ingo Molnar
2013-09-05 19:33 ` Andi Kleen
2013-09-05 17:12 ` Ingo Molnar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20130905151034.GP19750@two.firstfloor.org \
--to=andi@firstfloor.org \
--cc=acme@infradead.org \
--cc=eranian@google.com \
--cc=jolsa@redhat.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@kernel.org \
--cc=peterz@infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.