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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 1/5] drm/i915: don't save/restore LBB on Gen5+
Date: Thu, 12 Sep 2013 20:36:18 +0300	[thread overview]
Message-ID: <20130912173618.GD20128@intel.com> (raw)
In-Reply-To: <1379005101-1500-1-git-send-email-przanoni@gmail.com>

On Thu, Sep 12, 2013 at 01:58:17PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> Because this PCI config register doesn't exist on Gen5+.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

Yep. Can't see it in configdb. Actually it's only listed there for CTG
and CLN, which I guess makes sense as non-mobile platforms probably
don't have backlights. For BLB and ELK it's listed as reserved and RO,
so I guess it doesn't hurt to poke it on them. If I'm wrong we could
probably slap on an IS_MOBILE() check there too. Older stuff doesn't
exist in configdb, so that's as far back as I can go.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_suspend.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
> index 70db618..3538370 100644
> --- a/drivers/gpu/drm/i915/i915_suspend.c
> +++ b/drivers/gpu/drm/i915/i915_suspend.c
> @@ -340,7 +340,9 @@ int i915_save_state(struct drm_device *dev)
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	int i;
>  
> -	pci_read_config_byte(dev->pdev, LBB, &dev_priv->regfile.saveLBB);
> +	if (INTEL_INFO(dev)->gen <= 4)
> +		pci_read_config_byte(dev->pdev, LBB,
> +				     &dev_priv->regfile.saveLBB);
>  
>  	mutex_lock(&dev->struct_mutex);
>  
> @@ -390,7 +392,9 @@ int i915_restore_state(struct drm_device *dev)
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	int i;
>  
> -	pci_write_config_byte(dev->pdev, LBB, dev_priv->regfile.saveLBB);
> +	if (INTEL_INFO(dev)->gen <= 4)
> +		pci_write_config_byte(dev->pdev, LBB,
> +				      dev_priv->regfile.saveLBB);
>  
>  	mutex_lock(&dev->struct_mutex);
>  
> -- 
> 1.8.3.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC

  parent reply	other threads:[~2013-09-12 17:36 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-09-12 16:58 [PATCH 1/5] drm/i915: don't save/restore LBB on Gen5+ Paulo Zanoni
2013-09-12 16:58 ` [PATCH 2/5] drm/i915: WARN if the DP aux read is too big Paulo Zanoni
2013-09-12 17:15   ` Chris Wilson
2013-09-12 21:03     ` [PATCH 2/5] drm/i915: fix intel_dp_aux_native_read's reply array size Paulo Zanoni
2013-09-13  9:21       ` Jani Nikula
2013-09-13 12:53         ` Damien Lespiau
2013-09-13 13:41           ` Jani Nikula
2013-09-13 13:50             ` Damien Lespiau
2013-09-16 19:26               ` Paulo Zanoni
2013-09-12 16:58 ` [PATCH 3/5] drm/i915: check for more ASLC interrupts Paulo Zanoni
2013-09-13 10:23   ` Jani Nikula
2013-09-12 16:58 ` [PATCH 4/5] drm/i915: clear opregon->lid_state after we unmap it Paulo Zanoni
2013-09-13 13:53   ` Rodrigo Vivi
2013-09-12 16:58 ` [PATCH 5/5] drm/i915: check for errors on i915_drm_thaw Paulo Zanoni
2013-09-12 17:10   ` Chris Wilson
2013-09-12 21:06     ` [PATCH 6/5] drm/i915: move more code to __i915_drm_thaw Paulo Zanoni
2013-09-12 21:44       ` Chris Wilson
2013-09-13  9:40         ` Daniel Vetter
2013-09-12 17:36 ` Ville Syrjälä [this message]
2013-09-13  9:41   ` [PATCH 1/5] drm/i915: don't save/restore LBB on Gen5+ Daniel Vetter

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