From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46205) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VKN9e-0008KH-8R for qemu-devel@nongnu.org; Fri, 13 Sep 2013 02:47:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VKN9Y-0003RB-Df for qemu-devel@nongnu.org; Fri, 13 Sep 2013 02:46:58 -0400 Received: from mail-pb0-f42.google.com ([209.85.160.42]:48645) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VKN9Y-0003Qx-7T for qemu-devel@nongnu.org; Fri, 13 Sep 2013 02:46:52 -0400 Received: by mail-pb0-f42.google.com with SMTP id un15so845999pbc.15 for ; Thu, 12 Sep 2013 23:46:51 -0700 (PDT) Date: Thu, 12 Sep 2013 23:47:02 -0700 From: Christoffer Dall Message-ID: <20130913064702.GC30894@cbox> References: <1377288624-7418-1-git-send-email-christoffer.dall@linaro.org> <1377288624-7418-3-git-send-email-christoffer.dall@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] [PATCH 2/5] hw: arm_gic: Introduce GIC_SET_PRIORITY macro List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: linaro-kernel@lists.linaro.org, qemu-devel@nongnu.org, patches@linaro.org, kvmarm@lists.cs.columbia.edu On Sun, Aug 25, 2013 at 04:37:44PM +0100, Alexander Graf wrote: > > On 23.08.2013, at 21:10, Christoffer Dall wrote: > > > To make the code slightly cleaner to look at and make the save/restore > > code easier to understand, introduce this macro to set the priority of > > interrupts. > > > > Signed-off-by: Christoffer Dall > > --- > > hw/intc/arm_gic.c | 6 +----- > > hw/intc/gic_internal.h | 6 ++++++ > > 2 files changed, 7 insertions(+), 5 deletions(-) > > > > diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c > > index bff3f9e..a7bb528 100644 > > --- a/hw/intc/arm_gic.c > > +++ b/hw/intc/arm_gic.c > > @@ -444,11 +444,7 @@ static void gic_dist_writeb(void *opaque, hwaddr offset, > > irq = (offset - 0x400) + GIC_BASE_IRQ; > > if (irq >= s->num_irq) > > goto bad_reg; > > - if (irq < GIC_INTERNAL) { > > - s->priority1[irq][cpu] = value; > > - } else { > > - s->priority2[irq - GIC_INTERNAL] = value; > > - } > > + GIC_SET_PRIORITY(irq, cpu, value); > > } else if (offset < 0xc00) { > > /* Interrupt CPU Target. RAZ/WI on uniprocessor GICs, with the > > * annoying exception of the 11MPCore's GIC. > > diff --git a/hw/intc/gic_internal.h b/hw/intc/gic_internal.h > > index 1426437..d835aa1 100644 > > --- a/hw/intc/gic_internal.h > > +++ b/hw/intc/gic_internal.h > > @@ -57,6 +57,12 @@ > > #define GIC_GET_PRIORITY(irq, cpu) (((irq) < GIC_INTERNAL) ? \ > > s->priority1[irq][cpu] : \ > > s->priority2[(irq) - GIC_INTERNAL]) > > +#define GIC_SET_PRIORITY(irq, cpu, val) do { \ > > + uint8_t *__x = ((irq) < GIC_INTERNAL) ? \ > > + &s->priority1[irq][cpu] : \ > > + &s->priority2[(irq) - GIC_INTERNAL]; \ > > + *__x = val; \ > > +} while (0) > > Why not make this a function? > Ah, you're no fun anymore. ok. -Christoffer