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Date:   Tue, 17 Sep 2013 18:02:19 +0200
From:   Ralf Baechle <ralf@linux-mips.org>
To:     Markos Chandras <Markos.Chandras@imgtec.com>
Cc:     linux-mips@linux-mips.org
Subject: Re: [PATCH] MIPS: Fix accessing to per-cpu data when flushing the
 cache
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On Tue, Sep 17, 2013 at 01:43:56PM +0200, Ralf Baechle wrote:

> > >I'd prefer if we change the caller otherwise depending on the platform
> > >a single cache flush might involve several preempt_disable/-enable
> > >invocations.  Something like below.
> > >
> > >And it also keeps the header file more usable outside the core kernel
> > >which Florian's recent zboot a little easier.
> > >
> > 
> > Hi Ralf,
> > 
> > Changing the caller instead of the function in the header file looks
> > good to me. Thanks for fixing it.
> 
> I think in the end the patch below is the better way of fixing it.

No, it's not.  Most systems have identical caches for all processors
in a system but there are exceptions, so my first patch is the right
one.

  Ralf