From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>,
Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 1/4] drm/i915: promote FIFO underruns to DRM_ERROR
Date: Fri, 20 Sep 2013 09:32:37 +0300 [thread overview]
Message-ID: <20130920063237.GK4531@intel.com> (raw)
In-Reply-To: <CA+gsUGQ6qhr_D3q+P-kqgXFOaoNTFeEm+CMZii0=gZK0-PWwog@mail.gmail.com>
On Thu, Sep 19, 2013 at 05:20:49PM -0300, Paulo Zanoni wrote:
> 2013/9/19 Chris Wilson <chris@chris-wilson.co.uk>:
> > On Thu, Sep 19, 2013 at 05:00:35PM -0300, Paulo Zanoni wrote:
> >> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> >>
> >> Linus recently complained about screen corruption when coming out of
> >> DPMS on his Haswell machine, and he also mentioned there were no error
> >> messages on the log. I think I can reproduce this problem, and when it
> >> happens I get a "FIFO underrun" message, but since it's just
> >> DRM_DEBUG_DRIVER it's hard to notice. So promote underruns to error
> >> messages because reports containing "I'm getting a FIFO underrun on
> >> pipe A" are way much better than "I'm getting a screen corruption".
> >
> > Sadly FIFO underruns on quite a few platforms are expected and
> > unfixable. Others they are just expected. We reduced the error level
> > because they are too noisy, and we were not in a position where the
> > underrun was actionable. As we do not yet have the underrun feedback in
> > place, I do not think we are ready for the onslaught of errors.
> >
> > At minimum, you should only set the error message for the platforms you
> > intend to fix.
>
> Hmmmm, yeah, I should have thought about this a little bit more. Sorry :(
>
> At least on ILK/SNB/IVB/HSW we have the code to stop flooding dmesg
> and the code to ignore the expected underruns, so I guess a patch
> touching just these platforms would be ok?
I would limit it to HSW before my ILK/SNB/IVB conversion to HSW
watermark code gets in. The current code apparently produces somewhat
incorrect results since according to Imre it even fixes some kind of
rare hang on ILK.
--
Ville Syrjälä
Intel OTC
next prev parent reply other threads:[~2013-09-20 6:32 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-19 20:00 [PATCH 0/4] Haswell modeset fixes Paulo Zanoni
2013-09-19 20:00 ` [PATCH 1/4] drm/i915: promote FIFO underruns to DRM_ERROR Paulo Zanoni
2013-09-19 20:16 ` Chris Wilson
2013-09-19 20:20 ` Paulo Zanoni
2013-09-19 20:27 ` Chris Wilson
2013-09-20 6:32 ` Ville Syrjälä [this message]
2013-09-20 18:38 ` Paulo Zanoni
2013-09-19 20:00 ` [PATCH 2/4] drm/i915: don't disable ERR_INT on the IRQ handler Paulo Zanoni
2013-09-19 20:18 ` Chris Wilson
2013-09-20 8:08 ` Daniel Vetter
2013-09-19 20:00 ` [PATCH 3/4] drm/i915: Disable/enable planes as the first/last thing during modeset on HSW Paulo Zanoni
2013-09-19 20:00 ` [PATCH 4/4] drm/i915: implement the Haswell mode set sequence workaround Paulo Zanoni
2013-09-20 6:29 ` Ville Syrjälä
2013-09-20 19:21 ` Paulo Zanoni
2013-10-01 19:24 ` Daniel Vetter
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