From: Greg KH <greg@kroah.com>
To: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Xenia Ragiadakou <burzalodowa@gmail.com>,
USB list <linux-usb@vger.kernel.org>,
Alan Stern <stern@rowland.harvard.edu>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>
Subject: Re: [PATCH] xhci: fix write to USB3_PSSEN and XUSB2PRM pci config registers
Date: Mon, 23 Sep 2013 20:01:19 -0700 [thread overview]
Message-ID: <20130924030119.GA5326@kroah.com> (raw)
In-Reply-To: <20130924002307.GB5682@xanatos>
On Mon, Sep 23, 2013 at 05:23:07PM -0700, Sarah Sharp wrote:
> On Mon, Sep 23, 2013 at 02:49:07PM -0700, Greg KH wrote:
> > On Mon, Sep 23, 2013 at 04:38:22PM -0500, Bjorn Helgaas wrote:
> > > On Mon, Sep 23, 2013 at 3:49 PM, Greg KH <greg@kroah.com> wrote:
> > > > On Mon, Sep 23, 2013 at 09:06:54PM +0300, Xenia Ragiadakou wrote:
> > > >> I had in mind that the pci_ops .read and .write defined by the PCI
> > > >> driver will take care of consistent byteorder access to the
> > > >> configuration registers. At least, that was what i understood after
> > > >> reading the
> > > >> chapter on PCI of Linux Device Drivers (more specifically for
> > > >> pci_write_config_* functions, it states that "The word and dword
> > > >> functions convert the value to little-endian before writing to the
> > > >> peripheral device.").
> > > >
> > > > Hm, I wrote that paragraph (or at least I think I did), but I sure
> > > > didn't remember this at all...
> > > >
> > > > Hm, wait, I do see this happening for the PowerPC cell PCI code, so it
> > > > might happen somewhere burried in the platform-specific code for
> > > > different arches. You will not see it happen on x86 as there's no need
> > > > to swap any bytes around.
> > >
> > > Greg, with regard to Xenia's patch, is this an ack or a nack? Since
> > > you didn't include an "Acked-by" line, I assume you think Xenia's
> > > patch is unnecessary. In that case, is there any way to shut sparse
> > > up so it doesn't complain about this?
> >
> > At this point in time, I don't remember what the original patch looked
> > like, and as it's an xhci patch, Sarah needs to ack it, not me :)
>
> Greg: So you're saying that there isn't a need to convert values from
> CPU byte-ordering to little endian byte-ordering before passing them on
> to pci_write_config_*?
That is correct. Xenia, thanks for figuring this out, nice job.
greg k-h
prev parent reply other threads:[~2013-09-24 3:00 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1379695553-5891-1-git-send-email-burzalodowa@gmail.com>
2013-09-23 16:45 ` [PATCH] xhci: fix write to USB3_PSSEN and XUSB2PRM pci config registers Sarah Sharp
2013-09-23 18:06 ` Xenia Ragiadakou
2013-09-23 20:49 ` Greg KH
2013-09-23 21:38 ` Bjorn Helgaas
2013-09-23 21:49 ` Greg KH
2013-09-24 0:23 ` Sarah Sharp
2013-09-24 3:01 ` Greg KH [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20130924030119.GA5326@kroah.com \
--to=greg@kroah.com \
--cc=bhelgaas@google.com \
--cc=burzalodowa@gmail.com \
--cc=linux-pci@vger.kernel.org \
--cc=linux-usb@vger.kernel.org \
--cc=sarah.a.sharp@linux.intel.com \
--cc=stern@rowland.harvard.edu \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.