Re: [PATCH] X86: MM: Add PAT Type write-through in combination with mtrr

[Borislav Petkov <bp@alien8.de>]

On Mon, Oct 28, 2013 at 11:34:28AM +0100, Andreas Werner wrote:
> Yes the reads are only for packet data, the commands or configuration
> registers are mapped non cachable.
> 
> I´ve tried WB, but on PCIe Tracer i could not see any burst access.
> Thats the reason why i have created this patch.
> 
> Is there a chance to get this patch into the kernel? Or
> is this solution so special?

Ok, but your patch returns WB pat type for WT MTRR type, AFAICT.

You want to do:

  PAT=Write-Back + MTRR=Write-Through = Effective Memory of Write-Through

but you end up doing

  PAT=Write-Back + MTRR=Write-Through = Effective Memory of Write-Back

What am I missing or misunderstanding?

AFAICT, you want to return _PAGE_PWT for MTRR_TYPE_WRTHROUGH, no?

-- 
Regards/Gruss,
    Boris.

Sent from a fat crate under my desk. Formatting is fine.
--