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From: Daniel Vetter <daniel@ffwll.ch>
To: ville.syrjala@linux.intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Sanitize prepare_pipes after valleyview_modeset_global_pipes()
Date: Wed, 6 Nov 2013 08:33:08 +0100	[thread overview]
Message-ID: <20131106073308.GG1775@phenom.ffwll.local> (raw)
In-Reply-To: <1383683652-32693-1-git-send-email-ville.syrjala@linux.intel.com>

On Tue, Nov 05, 2013 at 10:34:12PM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> valleyview_modeset_global_pipes() may add pipes that are getting fully
> disabled to prepare_pipes bitmask. The rest of the code doesn't expect
> this, so clear out any such pipes from the prepare_pipes bitmask.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index f97e895..ddbef9c 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9514,10 +9514,14 @@ static int __intel_set_mode(struct drm_crtc *crtc,
>  	 * mode set on this crtc.  For other crtcs we need to use the
>  	 * adjusted_mode bits in the crtc directly.
>  	 */
> -	if (IS_VALLEYVIEW(dev))
> +	if (IS_VALLEYVIEW(dev)) {
>  		valleyview_modeset_global_pipes(dev, &prepare_pipes,
>  						modeset_pipes, pipe_config);
>  
> +		/* may have added more to prepare_pipes than we should */
> +		prepare_pipes &= ~disable_pipes;
> +	}

I'd have move the full "take disable_pipes out" block from affected_pipes.
Afacs there's no need to do it twice.
-Daniel
> +
>  	for_each_intel_crtc_masked(dev, disable_pipes, intel_crtc)
>  		intel_crtc_disable(&intel_crtc->base);
>  
> -- 
> 1.8.1.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

  reply	other threads:[~2013-11-06  7:32 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-05 20:34 [PATCH] drm/i915: Sanitize prepare_pipes after valleyview_modeset_global_pipes() ville.syrjala
2013-11-06  7:33 ` Daniel Vetter [this message]
2013-11-06 10:42   ` Ville Syrjälä
2013-11-06 16:29     ` Daniel Vetter

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