From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 1/2] drm/i915/vlv: Workaround a punit issue in DDR data rate for 1333. Date: Thu, 7 Nov 2013 16:01:50 +0200 Message-ID: <20131107140150.GT5986@intel.com> References: <1383809007-19552-1-git-send-email-chon.ming.lee@intel.com> <20131107124639.GJ5986@intel.com> <20131107134955.GB31944@clee30-mobl2.gar.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 56C75EF36B for ; Thu, 7 Nov 2013 06:02:24 -0800 (PST) Content-Disposition: inline In-Reply-To: <20131107134955.GB31944@clee30-mobl2.gar.corp.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: "Lee, Chon Ming" Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, Nov 07, 2013 at 09:49:55PM +0800, Lee, Chon Ming wrote: > On 11/07 14:46, Ville Syrj=E4l=E4 wrote: > > On Thu, Nov 07, 2013 at 03:23:26PM +0800, Chon Ming Lee wrote: > > > For DDR data rate reporting by Punit in PUNIT_GPU_FREQ_STS, the actual > > > data encoding is 00b=3D800, 01b=3D1066, 10b=3D1333, 11b=3D1333. > > > = > > > Some premium VLV sku will get the DDR_DATA_RATE set as 11. As a resu= lt, > > > the turbo frequency reporting will be incorrect without this workarou= nd. > > = > > Does that mean that the original encoding we used was in fact correct, > > and the new one is not? > > = > = > The spec documents the encoding is 00b=3D800, 01b=3D1066, 10b=3D1333, 11b= =3Dinvalid = There was another encoding in some older spec. And we just changed from that to the current one. > = > But after check with the punit owner, the 11b is refer to 1333 as well. = It is > not invalid anymore. OK. In that case: Reviewed-by: Ville Syrj=E4l=E4 > = > > > = > > > Signed-off-by: Chon Ming Lee > > > --- > > > drivers/gpu/drm/i915/intel_pm.c | 7 +------ > > > 1 files changed, 1 insertions(+), 6 deletions(-) > > > = > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/i= ntel_pm.c > > > index a5778e5..13fb7f8 100644 > > > --- a/drivers/gpu/drm/i915/intel_pm.c > > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > > @@ -5328,12 +5328,7 @@ static void valleyview_init_clock_gating(struc= t drm_device *dev) > > > dev_priv->mem_freq =3D 1333; > > > break; > > > case 3: > > > - /* > > > - * Probably a BIOS/Punit bug, or a new platform we don't > > > - * support yet. > > > - */ > > > - WARN(1, "invalid DDR freq detected, assuming 800MHz\n"); > > > - dev_priv->mem_freq =3D 800; > > > + dev_priv->mem_freq =3D 1333; > > > break; > > > } > > > DRM_DEBUG_DRIVER("DDR speed: %d MHz", dev_priv->mem_freq); > > > -- = > > > 1.7.7.6 > > > = > > > _______________________________________________ > > > Intel-gfx mailing list > > > Intel-gfx@lists.freedesktop.org > > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > = > > -- = > > Ville Syrj=E4l=E4 > > Intel OTC -- = Ville Syrj=E4l=E4 Intel OTC