From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 2/2] drm/i915/vlv: For i915_cur_delayinfo, the max frequency reporting wrong value. Date: Thu, 7 Nov 2013 16:21:58 +0200 Message-ID: <20131107142158.GV5986@intel.com> References: <1383809007-19552-1-git-send-email-chon.ming.lee@intel.com> <1383809007-19552-2-git-send-email-chon.ming.lee@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 24D4338DD1 for ; Thu, 7 Nov 2013 06:22:01 -0800 (PST) Content-Disposition: inline In-Reply-To: <1383809007-19552-2-git-send-email-chon.ming.lee@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chon Ming Lee Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, Nov 07, 2013 at 03:23:27PM +0800, Chon Ming Lee wrote: > The max frequency reporting is not correct. But there is already an exis= ting > valleyview_rps_max_freq and valleyview_rps_min_freq to get the > frequency. Use that for i915_cur_delayinfo. > = > Signed-off-by: Chon Ming Lee > --- > drivers/gpu/drm/i915/i915_debugfs.c | 4 ++-- > 1 files changed, 2 insertions(+), 2 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i= 915_debugfs.c > index cae3e9c..5254d95 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -972,11 +972,11 @@ static int i915_cur_delayinfo(struct seq_file *m, v= oid *unused) > seq_printf(m, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts); > seq_printf(m, "DDR freq: %d MHz\n", dev_priv->mem_freq); > = > - val =3D vlv_punit_read(dev_priv, PUNIT_FUSE_BUS1); > + val =3D valleyview_rps_max_freq(dev_priv); I'm not actually sure about the NC freq stuff. Not sure where that is even documented. The punit turbo HAS tells us to read the max and guaranteed freqs from PUNIT_FUSE_BUS1. Maybe we should actually change valleyview_rps_max_freq() and valleyview_rps_rpe_freq() to read them from PUNIT_FUSE_BUS1? > seq_printf(m, "max GPU freq: %d MHz\n", > vlv_gpu_freq(dev_priv->mem_freq, val)); > = > - val =3D vlv_punit_read(dev_priv, PUNIT_REG_GPU_LFM); > + val =3D valleyview_rps_min_freq(dev_priv); This one is the same register, just with masking, so this change looks OK. And it matches the punit turbo HAS. > seq_printf(m, "min GPU freq: %d MHz\n", > vlv_gpu_freq(dev_priv->mem_freq, val)); > = > -- = > 1.7.7.6 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC