From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Monjalon Subject: Re: Sporadic errors while initializing NICs in example applications, dpdk-1.5.0r1 Date: Wed, 27 Nov 2013 15:42:05 +0100 Message-ID: <201311271542.05288.thomas.monjalon@6wind.com> References: <528F4E41.2000405@gmail.com> <201311221348.02307.thomas.monjalon@6wind.com> <5295FC76.70201@gmail.com> Mime-Version: 1.0 Content-Type: Text/Plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: dev-VfR2kkLFssw@public.gmane.org To: Dmitry Vyal Return-path: In-Reply-To: <5295FC76.70201-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces-VfR2kkLFssw@public.gmane.org Sender: "dev" 27/11/2013 15:06, Dmitry Vyal : > Looks like I finally found the reason. After applying this patch I can > no longer reproduce the error. > > --- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_82599.c > +++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_82599.c > /* Wait for AN to leave state 0 */ > - for (i = 0; i < 10; i++) { > + for (i = 0; i < 100; i++) { > msec_delay(4); > anlp1_reg = IXGBE_READ_REG(hw, IXGBE_ANLP1); > if (anlp1_reg & IXGBE_ANLP1_AN_STATE_MASK) It's probably due to a frequency scaling. The timer based is initialized when DPDK initialize and the CPU can change its frequency, breaking next timers. The fix is to control the CPU frequency. Please try this, without your patch: for g in /sys/devices/system/cpu/*/cpufreq/scaling_governor; do echo performance >$g; done The right fix for applications (examples and testpmd included) could be to call rte_power_init(). Patches are welcomed. Thank you for your analysis -- Thomas