From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915: use crtc_htotal in watermark calculations to match fastboot v2 Date: Wed, 27 Nov 2013 21:12:52 +0200 Message-ID: <20131127191252.GZ10036@intel.com> References: <1385579426-1808-1-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id C2936F9CEB for ; Wed, 27 Nov 2013 11:13:00 -0800 (PST) Content-Disposition: inline In-Reply-To: <1385579426-1808-1-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Nov 27, 2013 at 11:10:26AM -0800, Jesse Barnes wrote: > This value is more correct, and matches what we read out in the fastboot > code. Without this, the watermark code will panic after the first mode > setting activity after a fastboot. > = > v2: fix up HSW ->clock usage too (Ville) > = > Signed-off-by: Jesse Barnes Reviewed-by: Ville Syrj=E4l=E4 > --- > drivers/gpu/drm/i915/intel_pm.c | 15 ++++++++------- > 1 file changed, 8 insertions(+), 7 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel= _pm.c > index 69cad60..9180562 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -1182,7 +1182,7 @@ static bool g4x_compute_wm0(struct drm_device *dev, > = > adjusted_mode =3D &to_intel_crtc(crtc)->config.adjusted_mode; > clock =3D adjusted_mode->crtc_clock; > - htotal =3D adjusted_mode->htotal; > + htotal =3D adjusted_mode->crtc_htotal; > hdisplay =3D to_intel_crtc(crtc)->config.pipe_src_w; > pixel_size =3D crtc->fb->bits_per_pixel / 8; > = > @@ -1269,7 +1269,7 @@ static bool g4x_compute_srwm(struct drm_device *dev, > crtc =3D intel_get_crtc_for_plane(dev, plane); > adjusted_mode =3D &to_intel_crtc(crtc)->config.adjusted_mode; > clock =3D adjusted_mode->crtc_clock; > - htotal =3D adjusted_mode->htotal; > + htotal =3D adjusted_mode->crtc_htotal; > hdisplay =3D to_intel_crtc(crtc)->config.pipe_src_w; > pixel_size =3D crtc->fb->bits_per_pixel / 8; > = > @@ -1500,7 +1500,7 @@ static void i965_update_wm(struct drm_crtc *unused_= crtc) > const struct drm_display_mode *adjusted_mode =3D > &to_intel_crtc(crtc)->config.adjusted_mode; > int clock =3D adjusted_mode->crtc_clock; > - int htotal =3D adjusted_mode->htotal; > + int htotal =3D adjusted_mode->crtc_htotal; > int hdisplay =3D to_intel_crtc(crtc)->config.pipe_src_w; > int pixel_size =3D crtc->fb->bits_per_pixel / 8; > unsigned long line_time_us; > @@ -1626,7 +1626,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_= crtc) > const struct drm_display_mode *adjusted_mode =3D > &to_intel_crtc(enabled)->config.adjusted_mode; > int clock =3D adjusted_mode->crtc_clock; > - int htotal =3D adjusted_mode->htotal; > + int htotal =3D adjusted_mode->crtc_htotal; > int hdisplay =3D to_intel_crtc(enabled)->config.pipe_src_w; > int pixel_size =3D enabled->fb->bits_per_pixel / 8; > unsigned long line_time_us; > @@ -1778,7 +1778,7 @@ static bool ironlake_compute_srwm(struct drm_device= *dev, int level, int plane, > crtc =3D intel_get_crtc_for_plane(dev, plane); > adjusted_mode =3D &to_intel_crtc(crtc)->config.adjusted_mode; > clock =3D adjusted_mode->crtc_clock; > - htotal =3D adjusted_mode->htotal; > + htotal =3D adjusted_mode->crtc_htotal; > hdisplay =3D to_intel_crtc(crtc)->config.pipe_src_w; > pixel_size =3D crtc->fb->bits_per_pixel / 8; > = > @@ -2471,8 +2471,9 @@ hsw_compute_linetime_wm(struct drm_device *dev, str= uct drm_crtc *crtc) > /* The WM are computed with base on how long it takes to fill a single > * row at the given clock rate, multiplied by 8. > * */ > - linetime =3D DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8, mode->clock); > - ips_linetime =3D DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8, > + linetime =3D DIV_ROUND_CLOSEST(mode->crtc_htotal * 1000 * 8, > + mode->crtc_clock); > + ips_linetime =3D DIV_ROUND_CLOSEST(mode->crtc_htotal * 1000 * 8, > intel_ddi_get_cdclk_freq(dev_priv)); > = > return PIPE_WM_LINETIME_IPS_LINETIME(ips_linetime) | > -- = > 1.8.4.2 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC