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From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 5/5] ARM: mx6: Enable PCIe on Sabrelite
Date: Sat, 30 Nov 2013 01:03:51 +0100	[thread overview]
Message-ID: <201311300103.52030.marex@denx.de> (raw)
In-Reply-To: <52961B8D.5070205@boundarydevices.com>

Hi Eric,

> Thanks Marek,
> 
> On 11/11/2013 09:22 AM, Marek Vasut wrote:
> > Enable PCI express on MX6 Sabrelite.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Albert Aribaud <albert.u.boot@aribaud.net>
> > Cc: Eric Nelson <eric.nelson@boundarydevices.com>
> > Cc: Fabio Estevam <fabio.estevam@freescale.com>
> > Cc: Stefano Babic <sbabic@denx.de>
> > ---
> > 
> >   board/boundary/nitrogen6x/nitrogen6x.c |  7 ++++++-
> >   include/configs/nitrogen6x.h           | 11 +++++++++++
> >   2 files changed, 17 insertions(+), 1 deletion(-)
> > 
> > diff --git a/board/boundary/nitrogen6x/nitrogen6x.c
> > b/board/boundary/nitrogen6x/nitrogen6x.c index 1712908..46be51e 100644
> > --- a/board/boundary/nitrogen6x/nitrogen6x.c
> > +++ b/board/boundary/nitrogen6x/nitrogen6x.c
> > @@ -369,7 +369,12 @@ int board_eth_init(bd_t *bis)
> > 
> >   		free(bus);
> >   	
> >   	}
> >   
> >   #endif
> > 
> > -	return 0;
> > +
> 
> I think this bit needs a different configuration option
> and should be disabled by default.

This activates all PCI/PCI-express ethernet cards, that's why CONFIG_PCI. I 
suppose testing CONFIG_CMD_NET would be a good idea here as well.

> > +#ifdef CONFIG_PCI
> > +	ret = pci_eth_init(bis);
> > +#endif
> > +
> 
> It seems to lock up the system if you don't have the proper
> device connected.

I am attaching you a patch, can you please try with the attached patch ? It 
should fix your enumeration issue.

btw. I noticed there's no PCIe reset connected on the sabrelite, that's a bit 
bad, we found out the PCIe reset should be connected, otherwise the PCIe will 
misbehave upon init sometimes.

> Without this bit, I was able to confirm proper enumeration
> of a PCIe bus with a USB 3.0 controller:
> 
>     00:01.0     - 16c3:abcd - Bridge device
>     01:00.0    - 1b21:0612 - Mass storage controller
> 
> Unfortunately, in a quick test, the image fails to boot
> without a PCIe device connected, or oddly, with a different
> PCIe ethernet controller connected.
> 
> I think it's handy to have the placeholder here, but
> I think you're the only person on the planet with the
> right set of components to make it work at the moment.

I'd usually be proud by hearing that, but ... I can't say I'm too happy about 
this ;-)

Best regards,
Marek Vasut
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  parent reply	other threads:[~2013-11-30  0:03 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-11 16:22 [U-Boot] [PATCH 1/5] ARM: armv7: Make indirect vector addresses globl Marek Vasut
2013-11-11 16:22 ` [U-Boot] [PATCH 2/5] ARM: lib: Add cpu_clock_teardown() call Marek Vasut
2013-11-27  8:44   ` Stefano Babic
2013-11-27  8:59     ` Marek Vasut
2013-11-27  9:24       ` Stefano Babic
2013-11-11 16:22 ` [U-Boot] [PATCH 3/5] ARM: mx6: Add PCI express clock configuration Marek Vasut
2013-11-27  8:45   ` Stefano Babic
2013-11-11 16:22 ` [U-Boot] [PATCH 4/5] ARM: mx6: Add PCI express driver Marek Vasut
2013-11-27  8:45   ` Stefano Babic
2013-11-11 16:22 ` [U-Boot] [PATCH 5/5] ARM: mx6: Enable PCIe on Sabrelite Marek Vasut
2013-11-27  8:45   ` Stefano Babic
2013-11-27  8:59     ` Marek Vasut
2013-11-27 14:03       ` Eric Nelson
2013-11-27 15:02         ` Marek Vasut
2013-11-27 16:19   ` Eric Nelson
2013-11-28  8:20     ` Stefano Babic
2013-11-30  0:06       ` Marek Vasut
2013-12-03  1:05         ` Eric Nelson
2013-12-03  8:12           ` Stefano Babic
2013-12-03  9:12             ` Marek Vasut
2013-12-03 10:21               ` Stefano Babic
2013-12-03 12:31                 ` Marek Vasut
2013-12-03  9:12           ` Marek Vasut
2013-11-30  0:03     ` Marek Vasut [this message]
2013-11-11 16:24 ` [U-Boot] [PATCH 1/5] ARM: armv7: Make indirect vector addresses globl Marek Vasut
2013-11-27  8:44 ` Stefano Babic

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