Re: [PATCH] ASoC: wm8962: Enable SYSCLK provisonally before fetching generated DSPCLK_DIV

[Nicolin Chen <b42378@freescale.com>]

On Thu, Dec 05, 2013 at 02:14:21PM +0000, Charles Keepax wrote:
> On Wed, Dec 04, 2013 at 05:22:16PM +0800, Nicolin Chen wrote:
> > DSPCLK_DIV can be only generated correctly after enabling SYSCLK. But if the
> > current bias_level hasn't reached SND_SOC_BIAS_ON, DAPM won't enable SYSCLK,
> > which would cause the calculation result from DSPCLK_DIV invalid since bit
> > DSPCLK_DIV will be finally turned to its true value after DAPM enables SYSCLK
> > while the driver won't calculate it again for the current instance. In this
> > circumstance, a playback which needs non-zero DSPCLK_DIV would be distorted
> > due to unexpected clock frequency resulted from an invalid DSPCLK_DIV value.
> > 
> > So this patch provisionally enables the SYSCLK to get a valid DSPCLK_DIV for
> > calculation and then disables it afterward.
> 
> Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
> 
> It feels like there should be a neater way to handle this, but I
> can't really see what that might be right now. So I think this
> looks fine for now and hopefully I can find some time to look at
> it in more detail soon.

Thanks Charles,

And I was preparing a patch for SSI and met a similar problem, after a few
reconsideration, I'm wondering if it's better to save the value of SYSCLK_ENA
and apply it after getting DSPCLK_DIV.

By doing this we can no more reply on bias_level, which looks more safer.

Best regards,
Nicolin Chen