From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arnd Bergmann Subject: Re: [Linaro-acpi] [RFC part1 PATCH 1/7] ACPI: Make ACPI core running without PCI on ARM64 Date: Fri, 6 Dec 2013 18:23:26 +0100 Message-ID: <201312061823.26481.arnd@arndb.de> References: <1386088611-2801-1-git-send-email-hanjun.guo@linaro.org> <201312052304.22302.arnd@arndb.de> <52A1E794.1040008@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <52A1E794.1040008@linaro.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Tomasz Nowicki Cc: Mark Rutland , Matthew Garrett , linaro-kernel@lists.linaro.org, Russell King - ARM Linux , patches@linaro.org, Olof Johansson , Catalin Marinas , Linus Walleij , Daniel Lezcano , "Rafael J. Wysocki" , linux-kernel@vger.kernel.org, Will Deacon , linaro-acpi@lists.linaro.org, linux-acpi@vger.kernel.org, Rob Herring , Bjorn Helgaas , linux-arm-kernel@lists.infradead.org List-Id: linux-acpi@vger.kernel.org T24gRnJpZGF5IDA2IERlY2VtYmVyIDIwMTMsIFRvbWFzeiBOb3dpY2tpIHdyb3RlOgo+IE9uIDA1 LjEyLjIwMTMgMjM6MDQsIEFybmQgQmVyZ21hbm4gd3JvdGU6Cj4gPiBPbiBXZWRuZXNkYXkgMDQg RGVjZW1iZXIgMjAxMywgSGFuanVuIEd1byB3cm90ZToKPiA+PiBPbiAyMDEz5bm0MTLmnIgwNOaX pSAwMDo0MSwgTWF0dGhldyBHYXJyZXR0IHdyb3RlOgo+ID4+PiBHaXZlbiB0aGUgbnVtYmVyIG9m ICNpZmRlZnMgeW91J3JlIGFkZGluZywgd291bGRuJ3QgaXQgbWFrZSBtb3JlIHNlbnNlCj4gPj4+ IHRvIGp1c3QgYWRkIHN0dWIgZnVuY3Rpb25zIHRvIGluY2x1ZGUvbGludXgvcGNpLmg/Cj4gPj4K PiA+PiBUaGFua3MgZm9yIHRoZSBzdWdnZXN0aW9uIDopCj4gPj4KPiA+PiBJIGNhbiBhZGQgc3R1 YiBmdW5jdGlvbnMgaW4gaW5jbHVkZS9saW51eC9wY2kuaCBmb3IgcmF3X3BjaV9yZWFkKCkvCj4g Pj4gcmF3X3BjaV93cml0ZSgpLCB0aGVuIGNhbiByZW1vdmUgI2lmZGVmcyBmb3IgYWNwaV9vc19y ZWFkL3dyaXRlX3BjaV9jb25maWd1cmF0aW9uKCkuCj4gPgo+ID4gQWN0dWFsbHkgSSB3b25kZXIg YWJvdXQgdGhlIHVzZWZ1bG5lc3Mgb2YgdGhpcyBwYXRjaCBpbiBlaXRoZXIgZm9ybTogU2luY2Ug QUNQSQo+ID4gb24gQVJNNjQgaXMgb25seSBmb3Igc2VydmVycywgSSB3b3VsZCB2ZXJ5IG11Y2gg ZXhwZWN0IHRoZW0gdG8gYWx3YXlzIGNvbWUgd2l0aAo+ID4gUENJLCBlaXRoZXIgcGh5c2ljYWwg aG9zdCBicmlkZ2VzIHdpdGggYXR0YWNoZWQgZGV2aWNlcywgb3IgbG9naWNhbCBQQ0kgZnVuY3Rp b25zCj4gPiB1c2VkIHRvIGRlc2NyaWJlIHRoZSBvbi1Tb0MgSS9PIGRldmljZXMuIEV2ZW4gaW4g Y2FzZSBvZiB2aXJ0dWFsIG1hY2hpbmVzLCB5b3UnZAo+ID4gbm9ybWFsbHkgdXNlIFBDSSBhcyB0 aGUgbWV0aG9kIHRvIGNvbW11bmljYXRlIGRhdGEgYWJvdXQgdGhlIHZpcnRpbyBjaGFubmVscy4K PiA+Cj4gPiBDYW4geW91IG5hbWUgYSByZWFsaXN0aWMgdXNlLWNhc2Ugd2hlcmUgeW91J2Qgd2Fu dCBBQ1BJIGJ1dCBub3QgUENJPwo+IAo+IFllcyB5b3UgY2FuIGRlc2NyaWJlIFNvQyBJL08gZGV2 aWNlcyB1c2luZyBsb2dpY2FsIFBDSSBmdW5jdGlvbnMgb25seSBpZiAKPiB0aGV5IGFyZSBvbiBQ Q0ksIGNvcnJlY3QgbWUgaWYgSSBhbSB3cm9uZy4gQWxzbywgZGV2aWNlcyBjYW4gYmUgcGxhY2Vk IAo+IG9ubHkgb24gSU9NRU0gKGxpa2UgZm9yIEFSTSBTb0MpIGFuZCBpdCBpcyBoYXJkIHRvIHBy ZWRpY3Qgd2hpY2ggd2F5IAo+IHZlbmRvcnMgY2hvc2UuIFNvIHdheSBkb24ndCBsZXQgaXQgYmUg Y29uZmlndXJhYmxlPyBBQ1BJIHNwZWMgc2F5cyAKPiBub3RoaW5nIGxpa2UgUENJIGlzIG5lZWRl ZCBmb3IgQUNQSSwgQUZBSUsuCgpZb3UgYXJlIHJpZ2h0IHRoYXQgdG9kYXkncyBBUk0gU29DcyBi YXNpY2FsbHkgbmV2ZXIgdXNlIFBDSSB0byBkZXNjcmliZQppbnRlcm5hbCBkZXZpY2VzIChJSVJD IFZJQSBWVDg1MDAgaXMgYW4gZXhjZXB0aW9uLCBidXQgdGhlaXIgUENJIHdhcwpqdXN0IGEgc29m dHdhcmUgZmFicmljYXRpb24pLgoKSG93ZXZlciwgd2hlbiB3ZSdyZSB0YWxraW5nIGFib3V0IEFD UEkgb24gQVJNNjQsIHRoYXQgaXMgbm90aGluZyBsaWtlIGNsYXNzaWMKQVJNIFNvQ3M6IEFzIEpv biBNYXN0ZXJzIG1lbnRpb25lZCwgdGhpcyBpcyBhYm91dCBuZXcgc2VydmVyIGhhcmR3YXJlIGZv bGxvd2luZwphIChzdGlsbCBzZWNyZXQsIGJ1dCBob3BlZnVsbHkgbm90IG11Y2ggbG9uZ2VyKSBo YXJkd2FyZSBzcGVjaWZpY2F0aW9uIHRoYXQgaXMKZXhwbGljaXRseSBkZXNpZ25lZCB0byBhbGxv dyBpbnRlcm9wZXJhYmlsaXR5IGJldHdlZW4gdmVuZG9ycywgc28gdGhleQptdXN0IGhhdmUgcHV0 IHNvbWUgdGhvdWdodCBpbnRvIGhvdyB0byBtYWtlIHRoZSBoYXJkd2FyZSBkaXNjb3ZlcmFibGUu IEl0CnNlZW1zIHRoYXQgdGhleSBhcmUgbW9kZWxpbmcgdGhpbmdzIGFmdGVyIGhvdyBpdCdzIGRv bmUgb24geDg2LCBhbmQgdGhlCm9ubHkgc2Vuc2libGUgd2F5IHRvIGhhdmUgZGlzY292ZXJhYmxl IGhhcmR3YXJlIHRoZXJlIGlzIFBDSS4gVGhpcyBpcwphbHNvIHdoYXQgYWxsIHg4NiBTb0NzIGRv LgoKCUFybmQKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f CmxpbnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5m cmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xp bnV4LWFybS1rZXJuZWwK From mboxrd@z Thu Jan 1 00:00:00 1970 From: arnd@arndb.de (Arnd Bergmann) Date: Fri, 6 Dec 2013 18:23:26 +0100 Subject: [Linaro-acpi] [RFC part1 PATCH 1/7] ACPI: Make ACPI core running without PCI on ARM64 In-Reply-To: <52A1E794.1040008@linaro.org> References: <1386088611-2801-1-git-send-email-hanjun.guo@linaro.org> <201312052304.22302.arnd@arndb.de> <52A1E794.1040008@linaro.org> Message-ID: <201312061823.26481.arnd@arndb.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Friday 06 December 2013, Tomasz Nowicki wrote: > On 05.12.2013 23:04, Arnd Bergmann wrote: > > On Wednesday 04 December 2013, Hanjun Guo wrote: > >> On 2013?12?04? 00:41, Matthew Garrett wrote: > >>> Given the number of #ifdefs you're adding, wouldn't it make more sense > >>> to just add stub functions to include/linux/pci.h? > >> > >> Thanks for the suggestion :) > >> > >> I can add stub functions in include/linux/pci.h for raw_pci_read()/ > >> raw_pci_write(), then can remove #ifdefs for acpi_os_read/write_pci_configuration(). > > > > Actually I wonder about the usefulness of this patch in either form: Since ACPI > > on ARM64 is only for servers, I would very much expect them to always come with > > PCI, either physical host bridges with attached devices, or logical PCI functions > > used to describe the on-SoC I/O devices. Even in case of virtual machines, you'd > > normally use PCI as the method to communicate data about the virtio channels. > > > > Can you name a realistic use-case where you'd want ACPI but not PCI? > > Yes you can describe SoC I/O devices using logical PCI functions only if > they are on PCI, correct me if I am wrong. Also, devices can be placed > only on IOMEM (like for ARM SoC) and it is hard to predict which way > vendors chose. So way don't let it be configurable? ACPI spec says > nothing like PCI is needed for ACPI, AFAIK. You are right that today's ARM SoCs basically never use PCI to describe internal devices (IIRC VIA VT8500 is an exception, but their PCI was just a software fabrication). However, when we're talking about ACPI on ARM64, that is nothing like classic ARM SoCs: As Jon Masters mentioned, this is about new server hardware following a (still secret, but hopefully not much longer) hardware specification that is explicitly designed to allow interoperability between vendors, so they must have put some thought into how to make the hardware discoverable. It seems that they are modeling things after how it's done on x86, and the only sensible way to have discoverable hardware there is PCI. This is also what all x86 SoCs do. Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161032Ab3LFRYK (ORCPT ); Fri, 6 Dec 2013 12:24:10 -0500 Received: from moutng.kundenserver.de ([212.227.126.171]:65244 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753940Ab3LFRYH (ORCPT ); Fri, 6 Dec 2013 12:24:07 -0500 From: Arnd Bergmann To: Tomasz Nowicki Subject: Re: [Linaro-acpi] [RFC part1 PATCH 1/7] ACPI: Make ACPI core running without PCI on ARM64 Date: Fri, 6 Dec 2013 18:23:26 +0100 User-Agent: KMail/1.12.2 (Linux/3.8.0-22-generic; KDE/4.3.2; x86_64; ; ) Cc: linux-arm-kernel@lists.infradead.org, Mark Rutland , Matthew Garrett , Bjorn Helgaas , linaro-kernel@lists.linaro.org, "Russell King - ARM Linux" , patches@linaro.org, Catalin Marinas , Linus Walleij , Daniel Lezcano , "Rafael J. Wysocki" , linux-kernel@vger.kernel.org, Will Deacon , linaro-acpi@lists.linaro.org, linux-acpi@vger.kernel.org, Olof Johansson , Rob Herring References: <1386088611-2801-1-git-send-email-hanjun.guo@linaro.org> <201312052304.22302.arnd@arndb.de> <52A1E794.1040008@linaro.org> In-Reply-To: <52A1E794.1040008@linaro.org> MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <201312061823.26481.arnd@arndb.de> X-Provags-ID: V02:K0:0JaQuxxThcoVxcFSJePauBilpu0nVSLU2XlPvNXjtRY vVH2WElzMo3de6VaLyeOLSuc1z5icOh4nYUzL6GhO4Df0tS/XO RJ0k9AT3s4fwxM48drLEuorHtBEsXiEexUEKUXA42k73DUP+VX ROQfcjCc//EbdS6MaZdRTVI4dEQJy6rOI951p1Jq7BB2whFuKa hfEhqTVV7jFpiLjqZBk8ZgeNCfKtj1EvZ6A/HAzDriRtMjt07K mE3MPA3+W2svCZnmgH3TsBlyUT+E3h/wEYV3zLTXy1NZJpIfa0 nN/96mFt7vOwxgy7ij0r5d4xVHj+o2klJaveo+4Fdph+PPZsOo tpDGL6+R852htkGr6ogs= Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Friday 06 December 2013, Tomasz Nowicki wrote: > On 05.12.2013 23:04, Arnd Bergmann wrote: > > On Wednesday 04 December 2013, Hanjun Guo wrote: > >> On 2013年12月04日 00:41, Matthew Garrett wrote: > >>> Given the number of #ifdefs you're adding, wouldn't it make more sense > >>> to just add stub functions to include/linux/pci.h? > >> > >> Thanks for the suggestion :) > >> > >> I can add stub functions in include/linux/pci.h for raw_pci_read()/ > >> raw_pci_write(), then can remove #ifdefs for acpi_os_read/write_pci_configuration(). > > > > Actually I wonder about the usefulness of this patch in either form: Since ACPI > > on ARM64 is only for servers, I would very much expect them to always come with > > PCI, either physical host bridges with attached devices, or logical PCI functions > > used to describe the on-SoC I/O devices. Even in case of virtual machines, you'd > > normally use PCI as the method to communicate data about the virtio channels. > > > > Can you name a realistic use-case where you'd want ACPI but not PCI? > > Yes you can describe SoC I/O devices using logical PCI functions only if > they are on PCI, correct me if I am wrong. Also, devices can be placed > only on IOMEM (like for ARM SoC) and it is hard to predict which way > vendors chose. So way don't let it be configurable? ACPI spec says > nothing like PCI is needed for ACPI, AFAIK. You are right that today's ARM SoCs basically never use PCI to describe internal devices (IIRC VIA VT8500 is an exception, but their PCI was just a software fabrication). However, when we're talking about ACPI on ARM64, that is nothing like classic ARM SoCs: As Jon Masters mentioned, this is about new server hardware following a (still secret, but hopefully not much longer) hardware specification that is explicitly designed to allow interoperability between vendors, so they must have put some thought into how to make the hardware discoverable. It seems that they are modeling things after how it's done on x86, and the only sensible way to have discoverable hardware there is PCI. This is also what all x86 SoCs do. Arnd