From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40366) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VqV53-0002vS-7Q for qemu-devel@nongnu.org; Tue, 10 Dec 2013 16:43:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VqV4o-00037B-3y for qemu-devel@nongnu.org; Tue, 10 Dec 2013 16:43:01 -0500 Received: from e34.co.us.ibm.com ([32.97.110.152]:53694) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VqV4n-000370-Ty for qemu-devel@nongnu.org; Tue, 10 Dec 2013 16:42:46 -0500 Received: from /spool/local by e34.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 10 Dec 2013 14:42:44 -0700 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Michael Roth In-Reply-To: References: <1386282785-466-1-git-send-email-mdroth@linux.vnet.ibm.com> <1386282785-466-11-git-send-email-mdroth@linux.vnet.ibm.com> Message-ID: <20131210214239.11040.11449@loki> Date: Tue, 10 Dec 2013 15:42:39 -0600 Subject: Re: [Qemu-devel] [PATCH v2 10/14] pci: allow 0 address for PCI IO regions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: "qemu-ppc@nongnu.org" , Alexey Kardashevskiy , QEMU Developers , Alexander Graf , Mike Day , Paul Mackerras , tyreld@linux.vnet.ibm.com, nfont@linux.vnet.ibm.com Quoting Peter Maydell (2013-12-05 17:33:48) > On 5 December 2013 22:33, Michael Roth wrote: > > Some kernels program a 0 address for io regions. PCI 3.0 spec > > sectio 6.2.5.1 doesn't seem to disallow this. > = > Hmm. The last PCI spec I looked at said 0 wasn't a valid MMIO > address, so the variant of this patch I wrote a while back made it > a per PCI device flag whether a particular device let you get away > with it: > http://patchwork.ozlabs.org/patch/269133/ > = > (the device in question for me was the versatile-pci host bridge). > = > And presumably whoever put that specific check for 0 into > QEMU had a reason for it. > = > On the other hand I can't now find whatever document it was > that I was reading that claimed 0 wasn't valid :-( Can't seem to find anything either, checked the 2.3 spec as well. I tried to look up the git history for the new_addr =3D=3D 0 check but unfortunately i= t seemed to be part of the initial check-in. The only clue I've found regarding special-casing for a 0-bar is this: "Power-up software can determine how much address space the device requires= by writing a value of all 1's to the register and then reading the value back.= The device will return 0's in all don't-care address bits, effectively specifyi= ng the address space required. Unimplemented Base Address registers are hardwi= red to zero." - PCI 3.0, 6.2.5.1 But that's only applicable in cases where we're sizing the bar. However, the way things are implemented in pci_bar_address(), update hooks for unimplemented/zero-sized bars as well as zero-address bars would be handled by the same code, so I wonder if that was initially added to check the form= er? It's a bit of a stretch, since QEMU sets the reported sizes and not the gue= st, but maybe? Does that seem familiar wrt the documentation you mentioned, or was it some= thing else? > = > thanks > -- PMM